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authorLaurent Bercot <ska-skaware@skarnet.org>2024-09-07 14:55:46 +0000
committerLaurent Bercot <ska@appnovation.com>2024-09-07 14:55:46 +0000
commit1559cbe1ebcea1dac3f5c3a40a51efedd7766ffc (patch)
tree8a8d1e0c31e3328c9897c3727a555c693ef8a2fc /musl/patches-in-mcm
downloadToolchainFactory-1559cbe1ebcea1dac3f5c3a40a51efedd7766ffc.tar.gz
Initial commit
Signed-off-by: Laurent Bercot <ska@appnovation.com>
Diffstat (limited to 'musl/patches-in-mcm')
-rw-r--r--musl/patches-in-mcm/binutils-2.37/0001-j2-234.diff572
-rw-r--r--musl/patches-in-mcm/binutils-2.37/0001-skip-destructors-on-mingw.patch32
l---------musl/patches-in-mcm/binutils-2.381
l---------musl/patches-in-mcm/binutils-2.391
l---------musl/patches-in-mcm/binutils-2.401
l---------musl/patches-in-mcm/binutils-2.411
-rw-r--r--musl/patches-in-mcm/gcc-10.1.0/0001-ssp_nonshared.diff14
-rw-r--r--musl/patches-in-mcm/gcc-10.1.0/0002-posix_memalign.diff30
-rw-r--r--musl/patches-in-mcm/gcc-10.1.0/0003-j2.diff346
-rw-r--r--musl/patches-in-mcm/gcc-10.1.0/0004-static-pie.diff92
l---------musl/patches-in-mcm/gcc-10.2.01
l---------musl/patches-in-mcm/gcc-10.3.01
l---------musl/patches-in-mcm/gcc-11.1.01
-rw-r--r--musl/patches-in-mcm/gcc-11.2.0/0000-nostdinc.diff26
-rw-r--r--musl/patches-in-mcm/gcc-11.2.0/0001-ssp_nonshared.diff14
-rw-r--r--musl/patches-in-mcm/gcc-11.2.0/0002-posix_memalign.diff30
-rw-r--r--musl/patches-in-mcm/gcc-11.2.0/0003-j2.diff346
-rw-r--r--musl/patches-in-mcm/gcc-11.2.0/0004-static-pie.diff92
-rw-r--r--musl/patches-in-mcm/gcc-11.2.0/0005-m68k-sqrt.diff20
-rw-r--r--musl/patches-in-mcm/gcc-11.2.0/0006-s390x-no-multilib.diff12
l---------musl/patches-in-mcm/gcc-11.3.01
-rw-r--r--musl/patches-in-mcm/gcc-12.2.0/0000-nostdinc.diff26
-rw-r--r--musl/patches-in-mcm/gcc-12.2.0/0002-posix_memalign.diff30
-rw-r--r--musl/patches-in-mcm/gcc-12.2.0/0005-m68k-sqrt.diff20
-rw-r--r--musl/patches-in-mcm/gcc-12.2.0/0006-s390x-no-multilib.diff12
l---------musl/patches-in-mcm/gcc-13.1.01
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0000-nostdinc.diff26
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0001-posix_memalign.patch42
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0002-gcc-poison-system-directories.patch203
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0003-specs-turn-on-Wl-z-now-by-default.patch44
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0004-static-pie.diff89
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch272
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0005-m68k-sqrt.diff20
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0006-Enable-Wformat-and-Wformat-security-by-default.patch34
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0007-Enable-Wtrampolines-by-default.patch25
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch53
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0009-Ensure-that-msgfmt-doesn-t-encounter-problems-during.patch54
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch28
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0011-libiberty-copy-PIC-objects-during-build-process.patch24
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0012-libgcc_s.patch57
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0013-nopie.patch75
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch24
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0019-aarch64-disable-multilib-support.patch26
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0020-s390x-disable-multilib-support.patch25
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0021-ppc64-le-disable-multilib-support.patch81
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0022-x86_64-disable-multilib-support.patch26
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0023-riscv-disable-multilib-support.patch76
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0024-always-build-libgcc_eh.a.patch51
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch256
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0028-configure-fix-detection-of-atomic-builtins-in-libato.patch57
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch27
-rw-r--r--musl/patches-in-mcm/gcc-13.2.0/0035-Fix-ICE-observed-in-PR110280.patch61
-rw-r--r--musl/patches-in-mcm/gdb-8.3.1/arm64.diff40
-rw-r--r--musl/patches-in-mcm/gdb-8.3.1/ppc-musl.diff93
-rw-r--r--musl/patches-in-mcm/gdb-8.3.1/ppc-ptregs.diff10
-rw-r--r--musl/patches-in-mcm/gdb-8.3.1/remove-extraneous-include.diff12
-rw-r--r--musl/patches-in-mcm/gdb-8.3.1/s390x-use-elf-gdb_fpregset_t.diff156
57 files changed, 3790 insertions, 0 deletions
diff --git a/musl/patches-in-mcm/binutils-2.37/0001-j2-234.diff b/musl/patches-in-mcm/binutils-2.37/0001-j2-234.diff
new file mode 100644
index 0000000..5b3d0b1
--- /dev/null
+++ b/musl/patches-in-mcm/binutils-2.37/0001-j2-234.diff
@@ -0,0 +1,572 @@
+diff -ur a/bfd/archures.c b/bfd/archures.c
+--- a/bfd/archures.c 2021-07-08 06:37:19.000000000 -0500
++++ b/bfd/archures.c 2021-08-28 13:06:15.018055475 -0500
+@@ -293,6 +293,8 @@
+ .#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
+ .#define bfd_mach_sh2a_or_sh4 0x2a3
+ .#define bfd_mach_sh2a_or_sh3e 0x2a4
++.#define bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu 0x2a5
++.#define bfd_mach_shj2 0x2c
+ .#define bfd_mach_sh2e 0x2e
+ .#define bfd_mach_sh3 0x30
+ .#define bfd_mach_sh3_nommu 0x31
+diff -ur a/bfd/bfd-in2.h b/bfd/bfd-in2.h
+--- a/bfd/bfd-in2.h 2021-07-08 06:37:19.000000000 -0500
++++ b/bfd/bfd-in2.h 2021-08-28 13:06:15.018055475 -0500
+@@ -1670,6 +1670,8 @@
+ #define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
+ #define bfd_mach_sh2a_or_sh4 0x2a3
+ #define bfd_mach_sh2a_or_sh3e 0x2a4
++#define bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu 0x2a5
++#define bfd_mach_shj2 0x2c
+ #define bfd_mach_sh2e 0x2e
+ #define bfd_mach_sh3 0x30
+ #define bfd_mach_sh3_nommu 0x31
+diff -ur a/bfd/cpu-sh.c b/bfd/cpu-sh.c
+--- a/bfd/cpu-sh.c 2021-07-08 06:37:19.000000000 -0500
++++ b/bfd/cpu-sh.c 2021-08-28 13:06:15.018055475 -0500
+@@ -63,7 +63,9 @@
+ N (bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, "sh2a-nofpu-or-sh4-nommu-nofpu", false, arch_info_struct + 16),
+ N (bfd_mach_sh2a_nofpu_or_sh3_nommu, "sh2a-nofpu-or-sh3-nommu", false, arch_info_struct + 17),
+ N (bfd_mach_sh2a_or_sh4, "sh2a-or-sh4", false, arch_info_struct + 18),
+- N (bfd_mach_sh2a_or_sh3e, "sh2a-or-sh3e", false, NULL)
++ N (bfd_mach_sh2a_or_sh3e, "sh2a-or-sh3e", false, arch_info_struct + 19),
++ N (bfd_mach_shj2, "j2", false, arch_info_struct + 20),
++ N (bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu, "sh2a-or-sh3e-or-j2", false, NULL)
+ };
+
+ const bfd_arch_info_type bfd_sh_arch =
+@@ -99,6 +101,8 @@
+ { bfd_mach_sh4_nofpu, arch_sh4_nofpu, arch_sh4_nofpu_up },
+ { bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
+ { bfd_mach_sh4a_nofpu, arch_sh4a_nofpu, arch_sh4a_nofpu_up },
++ { bfd_mach_shj2, arch_shj2, arch_shj2_up },
++ { bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up },
+ { 0, 0, 0 } /* Terminator. */
+ };
+
+diff -ur a/binutils/readelf.c b/binutils/readelf.c
+--- a/binutils/readelf.c 2021-07-08 06:37:19.000000000 -0500
++++ b/binutils/readelf.c 2021-08-28 13:06:15.022055532 -0500
+@@ -3729,6 +3729,8 @@
+ case EF_SH2A_SH3_NOFPU: strcat (buf, ", sh2a-nofpu-or-sh3-nommu"); break;
+ case EF_SH2A_SH4: strcat (buf, ", sh2a-or-sh4"); break;
+ case EF_SH2A_SH3E: strcat (buf, ", sh2a-or-sh3e"); break;
++ case EF_SHJ2: strcat (buf, ", j2"); break;
++ case EF_SH2A_SH3_SHJ2: strcat (buf, ", sh2a-nofpu-or-sh3-nommu-or-shj2 -nofpu"); break;
+ default: strcat (buf, _(", unknown ISA")); break;
+ }
+
+diff -ur a/gas/config/tc-sh.c b/gas/config/tc-sh.c
+--- a/gas/config/tc-sh.c 2021-07-08 06:37:19.000000000 -0500
++++ b/gas/config/tc-sh.c 2021-08-28 13:06:15.022055532 -0500
+@@ -1251,6 +1251,8 @@
+ ptr++;
+ }
+ get_operand (&ptr, operand + 2);
++ if (strcmp (info->name,"cas") == 0)
++ operand[2].type = A_IND_0;
+ }
+ else
+ {
+@@ -1790,7 +1792,10 @@
+ goto fail;
+ reg_m = 4;
+ break;
+-
++ case A_IND_0:
++ if (user->reg != 0)
++ goto fail;
++ break;
+ default:
+ printf (_("unhandled %d\n"), arg);
+ goto fail;
+diff -ur a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s
+--- a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s 2021-08-28 13:06:15.022055532 -0500
+@@ -12,8 +12,6 @@
+ sh2a_nofpu_or_sh3_nommu:
+ ! Instructions introduced into sh2a-nofpu-or-sh3-nommu
+ pref @r4 ;!/* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
+
+ ! Instructions inherited from ancestors: sh sh2
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s
+--- a/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s 2021-08-28 13:06:15.022055532 -0500
+@@ -12,7 +12,7 @@
+ sh2a_nofpu_or_sh4_nommu_nofpu:
+ ! Instructions introduced into sh2a-nofpu-or-sh4-nommu-nofpu
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -119,8 +119,8 @@
+ rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh2a-nofpu.s b/gas/testsuite/gas/sh/arch/sh2a-nofpu.s
+--- a/gas/testsuite/gas/sh/arch/sh2a-nofpu.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh2a-nofpu.s 2021-08-28 13:06:15.022055532 -0500
+@@ -64,7 +64,7 @@
+ movu.b @(2048,r5),r4 ;!/* 0011nnnnmmmm0001 1000dddddddddddd movu.b @(<DISP12>,<REG_M>),<REG_N> */ {"movu.b",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_8,DISP0_12}, arch_sh2a_nofpu_up | arch_op32}
+ movu.w @(2048,r5),r4 ;!/* 0011nnnnmmmm0001 1001dddddddddddd movu.w @(<DISP12>,<REG_M>),<REG_N> */ {"movu.w",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_9,DISP0_12BY2}, arch_sh2a_nofpu_up | arch_op32}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -171,8 +171,8 @@
+ rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s b/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s
+--- a/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s 2021-08-28 13:06:15.022055532 -0500
+@@ -13,7 +13,7 @@
+ ! Instructions introduced into sh2a-or-sh3e
+ fsqrt fr1 ;!/* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh3e_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2e
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2e
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -124,8 +124,8 @@
+ rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s b/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s
+--- a/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s 2021-08-28 13:06:15.022055532 -0500
+@@ -39,7 +39,7 @@
+ fsub dr4,dr2 ;!/* 1111nnn0mmm00001 fsub <D_REG_M>,<D_REG_N>*/{"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh2a_or_sh4_up}
+ ftrc dr2,FPUL ;!/* 1111nnnn00111101 ftrc <D_REG_N>,FPUL*/{"ftrc",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh2a_or_sh4_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2e
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2e
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -150,8 +150,8 @@
+ rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh2a.s b/gas/testsuite/gas/sh/arch/sh2a.s
+--- a/gas/testsuite/gas/sh/arch/sh2a.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh2a.s 2021-08-28 13:06:15.022055532 -0500
+@@ -16,7 +16,7 @@
+ fmov.s fr2,@(2048,r4) ;!/* 0011nnnnmmmm0001 0011dddddddddddd fmov.s <F_REG_M>,@(<DISP12>,<REG_N>) */ {"fmov.s",{F_REG_M,A_DISP_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_3,DISP1_12BY4}, arch_sh2a_up | arch_op32}
+ fmov.s @(2048,r5),fr1 ;!/* 0011nnnnmmmm0001 0111dddddddddddd fmov.s @(<DISP12>,<REG_M>),<F_REG_N> */ {"fmov.s",{A_DISP_REG_M,F_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_7,DISP0_12BY4}, arch_sh2a_up | arch_op32}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -140,8 +140,8 @@
+ rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh3-dsp.s b/gas/testsuite/gas/sh/arch/sh3-dsp.s
+--- a/gas/testsuite/gas/sh/arch/sh3-dsp.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh3-dsp.s 2021-08-28 13:06:15.022055532 -0500
+@@ -12,7 +12,7 @@
+ sh3_dsp:
+ ! Instructions introduced into sh3-dsp
+
+-! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh3 sh3-nommu
++! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh3 sh3-nommu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -152,8 +152,8 @@
+ setrc #4 ;!/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up}
+ repeat 10 20 r4 ;!/* repeat start end <REG_N> */{"repeat",{A_DISP_PC,A_DISP_PC,A_REG_N},{REPEAT,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up}
+ repeat 10 20 #4 ;!/* repeat start end #<imm> */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh3e.s b/gas/testsuite/gas/sh/arch/sh3e.s
+--- a/gas/testsuite/gas/sh/arch/sh3e.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh3e.s 2021-08-28 13:06:15.022055532 -0500
+@@ -12,7 +12,7 @@
+ sh3e:
+ ! Instructions introduced into sh3e
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-or-sh3e sh2e sh3 sh3-nommu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-or-sh3e sh2e sh3 sh3-nommu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -132,8 +132,8 @@
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh3-nommu.s b/gas/testsuite/gas/sh/arch/sh3-nommu.s
+--- a/gas/testsuite/gas/sh/arch/sh3-nommu.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh3-nommu.s 2021-08-28 13:06:15.022055532 -0500
+@@ -26,7 +26,7 @@
+ stc.l SPC,@-r4 ;!/* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}, arch_sh3_nommu_up}
+ stc.l r1_bank,@-r4 ;!/* 0100nnnn1xxx0011 stc.l Rn_BANK,@-<REG_N> */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}, arch_sh3_nommu_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -133,8 +133,8 @@
+ rte ;!/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh3.s b/gas/testsuite/gas/sh/arch/sh3.s
+--- a/gas/testsuite/gas/sh/arch/sh3.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh3.s 2021-08-28 13:06:15.022055532 -0500
+@@ -13,7 +13,7 @@
+ ! Instructions introduced into sh3
+ ldtlb ;!/* 0000000000111000 ldtlb */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh3_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh3-nommu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh3-nommu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -128,8 +128,8 @@
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh4al-dsp.s b/gas/testsuite/gas/sh/arch/sh4al-dsp.s
+--- a/gas/testsuite/gas/sh/arch/sh4al-dsp.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh4al-dsp.s 2021-08-28 13:06:15.022055532 -0500
+@@ -48,7 +48,7 @@
+ dct pswap x1,m0 ;!/* 10011101xx01zzzz pswap <DSP_REG_X>,<DSP_REG_N> */ {"pswap", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_9,HEX_D,HEX_1}, arch_sh4al_dsp_up}
+ dct pswap y0,m0 ;!/* 1011110101yyzzzz pswap <DSP_REG_Y>,<DSP_REG_N> */ {"pswap", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_D,HEX_4}, arch_sh4al_dsp_up}
+
+-! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-dsp sh3-nommu sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
++! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-dsp sh3-nommu sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -202,8 +202,8 @@
+ setrc #4 ;!/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up}
+ repeat 10 20 r4 ;!/* repeat start end <REG_N> */{"repeat",{A_DISP_PC,A_DISP_PC,A_REG_N},{REPEAT,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up}
+ repeat 10 20 #4 ;!/* repeat start end #<imm> */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh4a-nofpu.s b/gas/testsuite/gas/sh/arch/sh4a-nofpu.s
+--- a/gas/testsuite/gas/sh/arch/sh4a-nofpu.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh4a-nofpu.s 2021-08-28 13:06:15.022055532 -0500
+@@ -19,7 +19,7 @@
+ prefi @r4 ;!/* 0000nnnn11010011 prefi @<REG_N> */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofpu_up}
+ synco ;!/* 0000000010101011 synco */{"synco",{0},{HEX_0,HEX_0,HEX_A,HEX_B}, arch_sh4a_nofpu_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nofpu sh4-nommu-nofpu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nofpu sh4-nommu-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -143,8 +143,8 @@
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh4a.s b/gas/testsuite/gas/sh/arch/sh4a.s
+--- a/gas/testsuite/gas/sh/arch/sh4a.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh4a.s 2021-08-28 13:06:15.022055532 -0500
+@@ -13,7 +13,7 @@
+ ! Instructions introduced into sh4a
+ fpchg ;!/* 1111011111111101 fpchg */{"fpchg",{0},{HEX_F,HEX_7,HEX_F,HEX_D}, arch_sh4a_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4 sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4 sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -147,8 +147,8 @@
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh4-nofpu.s b/gas/testsuite/gas/sh/arch/sh4-nofpu.s
+--- a/gas/testsuite/gas/sh/arch/sh4-nofpu.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh4-nofpu.s 2021-08-28 13:06:15.022055532 -0500
+@@ -12,7 +12,7 @@
+ sh4_nofpu:
+ ! Instructions introduced into sh4-nofpu
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nommu-nofpu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nommu-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -136,8 +136,8 @@
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s b/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s
+--- a/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s 2021-08-28 13:06:15.022055532 -0500
+@@ -24,7 +24,7 @@
+ stc.l SGR,@-r4 ;!/* 0100nnnn00110010 stc.l SGR,@-<REG_N> */{"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_2}, arch_sh4_nommu_nofpu_up}
+ stc.l DBR,@-r4 ;!/* 0100nnnn11110010 stc.l DBR,@-<REG_N> */{"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_F,HEX_2}, arch_sh4_nommu_nofpu_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3-nommu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3-nommu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -139,8 +139,8 @@
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/gas/testsuite/gas/sh/arch/sh4.s b/gas/testsuite/gas/sh/arch/sh4.s
+--- a/gas/testsuite/gas/sh/arch/sh4.s 2021-07-08 06:37:20.000000000 -0500
++++ b/gas/testsuite/gas/sh/arch/sh4.s 2021-08-28 13:06:15.022055532 -0500
+@@ -17,7 +17,7 @@
+ fsrra fr1 ;!/* 1111nnnn01111101 fsrra <F_REG_N> */{"fsrra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4_up}
+ ftrv xmtrx,fv0 ;!/* 1111nn0111111101 ftrv XMTRX_M4,<V_REG_n>*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_N_B01,HEX_F,HEX_D}, arch_sh4_up}
+
+-! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4-nofpu sh4-nommu-nofpu
++! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4-nofpu sh4-nommu-nofpu
+ add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
+ add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
+ addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
+@@ -145,8 +145,8 @@
+ rts ;!/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
+ sets ;!/* 0000000001011000 sets */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
+ sett ;!/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
+- shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
+- shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
++ shad r5,r4 ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
++ shld r5,r4 ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
+ shal r4 ;!/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
+ shar r4 ;!/* 0100nnnn00100001 shar <REG_N> */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
+ shll r4 ;!/* 0100nnnn00000000 shll <REG_N> */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
+diff -ur a/include/elf/sh.h b/include/elf/sh.h
+--- a/include/elf/sh.h 2021-07-08 06:37:20.000000000 -0500
++++ b/include/elf/sh.h 2021-08-28 13:06:15.022055532 -0500
+@@ -39,6 +39,7 @@
+ #define EF_SH2E 11
+ #define EF_SH4A 12
+ #define EF_SH2A 13
++#define EF_SHJ2 14
+
+ #define EF_SH4_NOFPU 16
+ #define EF_SH4A_NOFPU 17
+@@ -50,6 +51,7 @@
+ #define EF_SH2A_SH3_NOFPU 22
+ #define EF_SH2A_SH4 23
+ #define EF_SH2A_SH3E 24
++#define EF_SH2A_SH3_SHJ2 25
+
+ /* This one can only mix in objects from other EF_SH5 objects. */
+ #define EF_SH5 10
+@@ -72,7 +74,8 @@
+ /* EF_SH2E */ bfd_mach_sh2e , \
+ /* EF_SH4A */ bfd_mach_sh4a , \
+ /* EF_SH2A */ bfd_mach_sh2a , \
+-/* 14, 15 */ 0, 0, \
++/* EF_SHJ2 */ bfd_mach_shj2 , \
++/* 15 */ 0, \
+ /* EF_SH4_NOFPU */ bfd_mach_sh4_nofpu , \
+ /* EF_SH4A_NOFPU */ bfd_mach_sh4a_nofpu , \
+ /* EF_SH4_NOMMU_NOFPU */ bfd_mach_sh4_nommu_nofpu, \
+@@ -81,7 +84,8 @@
+ /* EF_SH2A_SH4_NOFPU */ bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, \
+ /* EF_SH2A_SH3_NOFPU */ bfd_mach_sh2a_nofpu_or_sh3_nommu, \
+ /* EF_SH2A_SH4 */ bfd_mach_sh2a_or_sh4 , \
+-/* EF_SH2A_SH3E */ bfd_mach_sh2a_or_sh3e
++/* EF_SH2A_SH3E */ bfd_mach_sh2a_or_sh3e, \
++/* EF_SH2A_SH3_SHJ2_NOFPU */ bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu
+
+ /* Convert arch_sh* into EF_SH*. */
+ int sh_find_elf_flags (unsigned int arch_set);
+diff -ur a/opcodes/sh-dis.c b/opcodes/sh-dis.c
+--- a/opcodes/sh-dis.c 2021-07-08 06:37:21.000000000 -0500
++++ b/opcodes/sh-dis.c 2021-08-28 13:06:15.022055532 -0500
+@@ -864,6 +864,9 @@
+ case XMTRX_M4:
+ fprintf_fn (stream, "xmtrx");
+ break;
++ case A_IND_0:
++ fprintf_fn (stream, "@r0");
++ break;
+ default:
+ abort ();
+ }
+diff -ur a/opcodes/sh-opc.h b/opcodes/sh-opc.h
+--- a/opcodes/sh-opc.h 2021-07-08 06:37:21.000000000 -0500
++++ b/opcodes/sh-opc.h 2021-08-28 13:06:15.022055532 -0500
+@@ -192,7 +192,8 @@
+ FPUL_N,
+ FPUL_M,
+ FPSCR_N,
+- FPSCR_M
++ FPSCR_M,
++ A_IND_0
+ }
+ sh_arg_type;
+
+@@ -216,9 +217,11 @@
+ #define arch_sh4_base (1 << 5)
+ #define arch_sh4a_base (1 << 6)
+ #define arch_sh2a_base (1 << 7)
+-#define arch_sh_base_mask MASK (0, 7)
++#define arch_shj2_base (1 << 8)
++#define arch_sh2a_sh3_shj2_base (1 << 9)
++#define arch_sh_base_mask MASK (0, 9)
+
+-/* Bits 8 ... 24 are currently free. */
++/* Bits 10 ... 24 are currently free. */
+
+ /* This is an annotation on instruction types, but we
+ abuse the arch field in instructions to denote it. */
+@@ -256,6 +259,8 @@
+ #define arch_sh2a_nofpu_or_sh3_nommu (arch_sh2a_sh3_base|arch_sh_no_mmu |arch_sh_no_co)
+ #define arch_sh2a_or_sh3e (arch_sh2a_sh4_base|arch_sh_no_mmu |arch_sh_sp_fpu)
+ #define arch_sh2a_or_sh4 (arch_sh2a_sh4_base|arch_sh_no_mmu |arch_sh_dp_fpu)
++#define arch_shj2 (arch_shj2_base |arch_sh_no_mmu |arch_sh_no_co)
++#define arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu (arch_sh2a_sh3_shj2_base|arch_sh_no_mmu |arch_sh_no_co)
+
+ #define SH_MERGE_ARCH_SET(SET1, SET2) ((SET1) & (SET2))
+ #define SH_VALID_BASE_ARCH_SET(SET) (((SET) & arch_sh_base_mask) != 0)
+@@ -320,7 +325,8 @@
+ #define arch_sh2_up (arch_sh2 \
+ | arch_sh2e_up \
+ | arch_sh2a_nofpu_or_sh3_nommu_up \
+- | arch_sh_dsp_up)
++ | arch_sh_dsp_up \
++ | arch_shj2_up)
+ #define arch_sh2a_nofpu_or_sh3_nommu_up (arch_sh2a_nofpu_or_sh3_nommu \
+ | arch_sh2a_nofpu_or_sh4_nommu_nofpu_up \
+ | arch_sh2a_or_sh3e_up \
+@@ -346,6 +352,12 @@
+ #define arch_sh4a_nofpu_up (arch_sh4a_nofpu \
+ | arch_sh4a_up \
+ | arch_sh4al_dsp_up)
++#define arch_shj2_up ( arch_shj2)
++#define arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up (arch_sh2a_nofpu_or_sh3_nommu \
++ | arch_sh2a_nofpu_or_sh4_nommu_nofpu_up \
++ | arch_sh2a_or_sh3e_up \
++ | arch_sh3_nommu_up \
++ | arch_shj2_up)
+
+ /* Right branches. */
+ #define arch_sh2e_up (arch_sh2e \
+@@ -714,9 +726,9 @@
+
+ /* repeat start end #<imm> */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8S,HEX_8}, arch_sh_dsp_up},
+
+-/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up},
++/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up},
+
+-/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up},
++/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up},
+
+ /* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up},
+
+@@ -1194,7 +1206,7 @@
+ {"movu.b",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_8,DISP0_12}, arch_sh2a_nofpu_up | arch_op32},
+ /* 0011nnnnmmmm0001 1001dddddddddddd movu.w @(<DISP12>,<REG_M>),<REG_N> */
+ {"movu.w",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_9,DISP0_12BY2}, arch_sh2a_nofpu_up | arch_op32},
+-
++ /* 0010nnnnmmmm0011 cas.l Rm,Rn,@R0 */ {"cas.l", { A_REG_M,A_REG_N,A_IND_0},{HEX_2,REG_N,REG_M,HEX_3}, arch_shj2_up},
+ { 0, {0}, {0}, 0 }
+ };
+
diff --git a/musl/patches-in-mcm/binutils-2.37/0001-skip-destructors-on-mingw.patch b/musl/patches-in-mcm/binutils-2.37/0001-skip-destructors-on-mingw.patch
new file mode 100644
index 0000000..2ff2e44
--- /dev/null
+++ b/musl/patches-in-mcm/binutils-2.37/0001-skip-destructors-on-mingw.patch
@@ -0,0 +1,32 @@
+diff -ur a/ld/scripttempl/pep.sc b/ld/scripttempl/pep.sc
+--- a/ld/scripttempl/pep.sc 2021-07-08 06:37:20.000000000 -0500
++++ b/ld/scripttempl/pep.sc 2021-08-28 13:05:42.673576567 -0500
+@@ -127,10 +127,8 @@
+ LONG (0); LONG (0);
+ }
+ ${CONSTRUCTING+
+- /* See comment about __CTOR_LIST__ above. The same reasoning
+- applies here too. */
+- ___DTOR_LIST__ = .;
+- __DTOR_LIST__ = .;
++ PROVIDE(___DTOR_LIST__ = .);
++ PROVIDE(__DTOR_LIST__ = .);
+ LONG (-1); LONG (-1);
+ KEEP (*(.dtors));
+ KEEP (*(.dtor));
+diff -ur a/ld/scripttempl/pe.sc b/ld/scripttempl/pe.sc
+--- a/ld/scripttempl/pe.sc 2021-07-08 06:37:20.000000000 -0500
++++ b/ld/scripttempl/pe.sc 2021-08-28 13:05:42.673576567 -0500
+@@ -126,10 +126,8 @@
+ LONG (0);
+ }
+ ${CONSTRUCTING+
+- /* See comment about __CTOR_LIST__ above. The same reasoning
+- applies here too. */
+- ___DTOR_LIST__ = .;
+- __DTOR_LIST__ = .;
++ PROVIDE(___DTOR_LIST__ = .);
++ PROVIDE(__DTOR_LIST__ = .);
+ LONG (-1);
+ KEEP(*(.dtors));
+ KEEP(*(.dtor));
diff --git a/musl/patches-in-mcm/binutils-2.38 b/musl/patches-in-mcm/binutils-2.38
new file mode 120000
index 0000000..10c264f
--- /dev/null
+++ b/musl/patches-in-mcm/binutils-2.38
@@ -0,0 +1 @@
+binutils-2.37 \ No newline at end of file
diff --git a/musl/patches-in-mcm/binutils-2.39 b/musl/patches-in-mcm/binutils-2.39
new file mode 120000
index 0000000..10c264f
--- /dev/null
+++ b/musl/patches-in-mcm/binutils-2.39
@@ -0,0 +1 @@
+binutils-2.37 \ No newline at end of file
diff --git a/musl/patches-in-mcm/binutils-2.40 b/musl/patches-in-mcm/binutils-2.40
new file mode 120000
index 0000000..10c264f
--- /dev/null
+++ b/musl/patches-in-mcm/binutils-2.40
@@ -0,0 +1 @@
+binutils-2.37 \ No newline at end of file
diff --git a/musl/patches-in-mcm/binutils-2.41 b/musl/patches-in-mcm/binutils-2.41
new file mode 120000
index 0000000..10c264f
--- /dev/null
+++ b/musl/patches-in-mcm/binutils-2.41
@@ -0,0 +1 @@
+binutils-2.37 \ No newline at end of file
diff --git a/musl/patches-in-mcm/gcc-10.1.0/0001-ssp_nonshared.diff b/musl/patches-in-mcm/gcc-10.1.0/0001-ssp_nonshared.diff
new file mode 100644
index 0000000..9e2fcca
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-10.1.0/0001-ssp_nonshared.diff
@@ -0,0 +1,14 @@
+diff --git a/gcc/gcc.c b/gcc/gcc.c
+index 9f790db0daf..e6887590ae2 100644
+--- a/gcc/gcc.c
++++ b/gcc/gcc.c
+@@ -877,7 +877,8 @@ proper position among the other output files. */
+ #ifndef LINK_SSP_SPEC
+ #ifdef TARGET_LIBC_PROVIDES_SSP
+ #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
+- "|fstack-protector-strong|fstack-protector-explicit:}"
++ "|fstack-protector-strong|fstack-protector-explicit" \
++ ":-lssp_nonshared}"
+ #else
+ #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
+ "|fstack-protector-strong|fstack-protector-explicit" \
diff --git a/musl/patches-in-mcm/gcc-10.1.0/0002-posix_memalign.diff b/musl/patches-in-mcm/gcc-10.1.0/0002-posix_memalign.diff
new file mode 100644
index 0000000..21c7ad2
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-10.1.0/0002-posix_memalign.diff
@@ -0,0 +1,30 @@
+diff --git a/gcc/config/i386/pmm_malloc.h b/gcc/config/i386/pmm_malloc.h
+index 87344d9383f..ece428df487 100644
+--- a/gcc/config/i386/pmm_malloc.h
++++ b/gcc/config/i386/pmm_malloc.h
+@@ -27,12 +27,13 @@
+ #include <stdlib.h>
+
+ /* We can't depend on <stdlib.h> since the prototype of posix_memalign
+- may not be visible. */
++ may not be visible and we can't pollute the namespace either. */
+ #ifndef __cplusplus
+-extern int posix_memalign (void **, size_t, size_t);
++extern int _mm_posix_memalign (void **, size_t, size_t)
+ #else
+-extern "C" int posix_memalign (void **, size_t, size_t) throw ();
++extern "C" int _mm_posix_memalign (void **, size_t, size_t) throw ()
+ #endif
++__asm__("posix_memalign");
+
+ static __inline void *
+ _mm_malloc (size_t __size, size_t __alignment)
+@@ -42,7 +43,7 @@ _mm_malloc (size_t __size, size_t __alignment)
+ return malloc (__size);
+ if (__alignment == 2 || (sizeof (void *) == 8 && __alignment == 4))
+ __alignment = sizeof (void *);
+- if (posix_memalign (&__ptr, __alignment, __size) == 0)
++ if (_mm_posix_memalign (&__ptr, __alignment, __size) == 0)
+ return __ptr;
+ else
+ return NULL;
diff --git a/musl/patches-in-mcm/gcc-10.1.0/0003-j2.diff b/musl/patches-in-mcm/gcc-10.1.0/0003-j2.diff
new file mode 100644
index 0000000..6fb0bee
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-10.1.0/0003-j2.diff
@@ -0,0 +1,346 @@
+diff --git a/gcc/config.gcc b/gcc/config.gcc
+index cf1a87e2efd..120c162bee7 100644
+--- a/gcc/config.gcc
++++ b/gcc/config.gcc
+@@ -547,7 +547,7 @@ s390*-*-*)
+ extra_headers="s390intrin.h htmintrin.h htmxlintrin.h vecintrin.h"
+ ;;
+ # Note the 'l'; we need to be able to match e.g. "shle" or "shl".
+-sh[123456789lbe]*-*-* | sh-*-*)
++sh[123456789lbej]*-*-* | sh-*-*)
+ cpu_type=sh
+ extra_options="${extra_options} fused-madd.opt"
+ extra_objs="${extra_objs} sh_treg_combine.o sh-mem.o sh_optimize_sett_clrt.o"
+@@ -3115,18 +3115,18 @@ s390x-ibm-tpf*)
+ extra_options="${extra_options} s390/tpf.opt"
+ tmake_file="${tmake_file} s390/t-s390"
+ ;;
+-sh-*-elf* | sh[12346l]*-*-elf* | \
+- sh-*-linux* | sh[2346lbe]*-*-linux* | \
++sh-*-elf* | sh[12346lj]*-*-elf* | \
++ sh-*-linux* | sh[2346lbej]*-*-linux* | \
+ sh-*-netbsdelf* | shl*-*-netbsdelf*)
+ tmake_file="${tmake_file} sh/t-sh sh/t-elf"
+ if test x${with_endian} = x; then
+ case ${target} in
+- sh[1234]*be-*-* | sh[1234]*eb-*-*) with_endian=big ;;
++ sh[j1234]*be-*-* | sh[j1234]*eb-*-*) with_endian=big ;;
+ shbe-*-* | sheb-*-*) with_endian=big,little ;;
+ sh[1234]l* | sh[34]*-*-linux*) with_endian=little ;;
+ shl* | sh*-*-linux* | \
+ sh-superh-elf) with_endian=little,big ;;
+- sh[1234]*-*-*) with_endian=big ;;
++ sh[j1234]*-*-*) with_endian=big ;;
+ *) with_endian=big,little ;;
+ esac
+ fi
+@@ -3193,6 +3193,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ sh2a_nofpu*) sh_cpu_target=sh2a-nofpu ;;
+ sh2a*) sh_cpu_target=sh2a ;;
+ sh2e*) sh_cpu_target=sh2e ;;
++ shj2*) sh_cpu_target=shj2;;
+ sh2*) sh_cpu_target=sh2 ;;
+ *) sh_cpu_target=sh1 ;;
+ esac
+@@ -3214,7 +3215,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ sh2a-single-only | sh2a-single | sh2a-nofpu | sh2a | \
+ sh4a-single-only | sh4a-single | sh4a-nofpu | sh4a | sh4al | \
+ sh4-single-only | sh4-single | sh4-nofpu | sh4 | sh4-300 | \
+- sh3e | sh3 | sh2e | sh2 | sh1) ;;
++ sh3e | sh3 | sh2e | sh2 | sh1 | shj2) ;;
+ "") sh_cpu_default=${sh_cpu_target} ;;
+ *) echo "with_cpu=$with_cpu not supported"; exit 1 ;;
+ esac
+@@ -3223,9 +3224,9 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ case ${target} in
+ sh[1234]*) sh_multilibs=${sh_cpu_target} ;;
+ sh-superh-*) sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
+- sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4 ;;
++ sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4,mj2 ;;
+ sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;;
+- *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;;
++ *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single,mj2 ;;
+ esac
+ if test x$with_fp = xno; then
+ sh_multilibs="`echo $sh_multilibs|sed -e s/m4/sh4-nofpu/ -e s/,m4-[^,]*//g -e s/,m[23]e// -e s/m2a,m2a-single/m2a-nofpu/ -e s/m5-..m....,//g`"
+@@ -3240,7 +3241,8 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ m1 | m2 | m2e | m3 | m3e | \
+ m4 | m4-single | m4-single-only | m4-nofpu | m4-300 |\
+ m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al | \
+- m2a | m2a-single | m2a-single-only | m2a-nofpu)
++ m2a | m2a-single | m2a-single-only | m2a-nofpu | \
++ mj2)
+ # TM_MULTILIB_CONFIG is used by t-sh for the non-endian multilib definition
+ # It is passed to MULTIILIB_OPTIONS verbatim.
+ TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG}/${sh_multilib}"
+@@ -3257,7 +3259,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ done
+ TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's:^/::'`
+ if test x${enable_incomplete_targets} = xyes ; then
+- tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1"
++ tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1 SUPPORT_SHJ2=1"
+ fi
+ tm_file="$tm_file ./sysroot-suffix.h"
+ tmake_file="$tmake_file t-sysroot-suffix"
+@@ -5042,6 +5044,8 @@ case "${target}" in
+ ;;
+ m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al)
+ ;;
++ mj2)
++ ;;
+ *)
+ echo "Unknown CPU used in --with-cpu=$with_cpu, known values:" 1>&2
+ echo "m1 m2 m2e m3 m3e m4 m4-single m4-single-only m4-nofpu" 1>&2
+@@ -5252,7 +5256,7 @@ case ${target} in
+ tmake_file="${cpu_type}/t-${cpu_type} ${tmake_file}"
+ ;;
+
+- sh[123456ble]*-*-* | sh-*-*)
++ sh[123456blej]*-*-* | sh-*-*)
+ c_target_objs="${c_target_objs} sh-c.o"
+ cxx_target_objs="${cxx_target_objs} sh-c.o"
+ ;;
+diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
+index 84c0ea025b4..f15552af011 100644
+--- a/gcc/config/sh/sh.c
++++ b/gcc/config/sh/sh.c
+@@ -686,6 +686,7 @@ parse_validate_atomic_model_option (const char* str)
+ model_names[sh_atomic_model::hard_llcs] = "hard-llcs";
+ model_names[sh_atomic_model::soft_tcb] = "soft-tcb";
+ model_names[sh_atomic_model::soft_imask] = "soft-imask";
++ model_names[sh_atomic_model::hard_cas] = "hard-cas";
+
+ const char* model_cdef_names[sh_atomic_model::num_models];
+ model_cdef_names[sh_atomic_model::none] = "NONE";
+@@ -693,6 +694,7 @@ parse_validate_atomic_model_option (const char* str)
+ model_cdef_names[sh_atomic_model::hard_llcs] = "HARD_LLCS";
+ model_cdef_names[sh_atomic_model::soft_tcb] = "SOFT_TCB";
+ model_cdef_names[sh_atomic_model::soft_imask] = "SOFT_IMASK";
++ model_cdef_names[sh_atomic_model::hard_cas] = "HARD_CAS";
+
+ sh_atomic_model ret;
+ ret.type = sh_atomic_model::none;
+@@ -771,6 +773,9 @@ got_mode_name:;
+ if (ret.type == sh_atomic_model::soft_imask && TARGET_USERMODE)
+ err_ret ("cannot use atomic model %s in user mode", ret.name);
+
++ if (ret.type == sh_atomic_model::hard_cas && !TARGET_SHJ2)
++ err_ret ("atomic model %s is only available J2 targets", ret.name);
++
+ return ret;
+
+ #undef err_ret
+@@ -827,6 +832,8 @@ sh_option_override (void)
+ sh_cpu = PROCESSOR_SH2E;
+ if (TARGET_SH2A)
+ sh_cpu = PROCESSOR_SH2A;
++ if (TARGET_SHJ2)
++ sh_cpu = PROCESSOR_SHJ2;
+ if (TARGET_SH3)
+ sh_cpu = PROCESSOR_SH3;
+ if (TARGET_SH3E)
+diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
+index 8ab5455505c..6ffed6da403 100644
+--- a/gcc/config/sh/sh.h
++++ b/gcc/config/sh/sh.h
+@@ -85,6 +85,7 @@ extern int code_for_indirect_jump_scratch;
+ #define SUPPORT_SH4_SINGLE 1
+ #define SUPPORT_SH2A 1
+ #define SUPPORT_SH2A_SINGLE 1
++#define SUPPORT_SHJ2 1
+ #endif
+
+ #define TARGET_DIVIDE_CALL_DIV1 (sh_div_strategy == SH_DIV_CALL_DIV1)
+@@ -117,6 +118,7 @@ extern int code_for_indirect_jump_scratch;
+ #define SELECT_SH4A_SINGLE_ONLY (MASK_SH4A | SELECT_SH4_SINGLE_ONLY)
+ #define SELECT_SH4A (MASK_SH4A | SELECT_SH4)
+ #define SELECT_SH4A_SINGLE (MASK_SH4A | SELECT_SH4_SINGLE)
++#define SELECT_SHJ2 (MASK_SHJ2 | SELECT_SH2)
+
+ #if SUPPORT_SH1
+ #define SUPPORT_SH2 1
+@@ -124,6 +126,7 @@ extern int code_for_indirect_jump_scratch;
+ #if SUPPORT_SH2
+ #define SUPPORT_SH3 1
+ #define SUPPORT_SH2A_NOFPU 1
++#define SUPPORT_SHJ2 1
+ #endif
+ #if SUPPORT_SH3
+ #define SUPPORT_SH4_NOFPU 1
+@@ -156,7 +159,7 @@ extern int code_for_indirect_jump_scratch;
+ #define MASK_ARCH (MASK_SH1 | MASK_SH2 | MASK_SH3 | MASK_SH_E | MASK_SH4 \
+ | MASK_HARD_SH2A | MASK_HARD_SH2A_DOUBLE | MASK_SH4A \
+ | MASK_HARD_SH4 | MASK_FPU_SINGLE \
+- | MASK_FPU_SINGLE_ONLY)
++ | MASK_FPU_SINGLE_ONLY | MASK_SHJ2)
+
+ /* This defaults us to big-endian. */
+ #ifndef TARGET_ENDIAN_DEFAULT
+@@ -231,7 +234,8 @@ extern int code_for_indirect_jump_scratch;
+ %{m2a-single:--isa=sh2a} \
+ %{m2a-single-only:--isa=sh2a} \
+ %{m2a-nofpu:--isa=sh2a-nofpu} \
+-%{m4al:-dsp}"
++%{m4al:-dsp} \
++%{mj2:-isa=j2}"
+
+ #define ASM_SPEC SH_ASM_SPEC
+
+@@ -347,6 +351,7 @@ struct sh_atomic_model
+ hard_llcs,
+ soft_tcb,
+ soft_imask,
++ hard_cas,
+
+ num_models
+ };
+@@ -390,6 +395,9 @@ extern const sh_atomic_model& selected_atomic_model (void);
+ #define TARGET_ATOMIC_SOFT_IMASK \
+ (selected_atomic_model ().type == sh_atomic_model::soft_imask)
+
++#define TARGET_ATOMIC_HARD_CAS \
++ (selected_atomic_model ().type == sh_atomic_model::hard_cas)
++
+ #endif // __cplusplus
+
+ #define SUBTARGET_OVERRIDE_OPTIONS (void) 0
+@@ -1484,7 +1492,7 @@ extern bool current_function_interrupt;
+
+ /* Nonzero if the target supports dynamic shift instructions
+ like shad and shld. */
+-#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A)
++#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A || TARGET_SHJ2)
+
+ /* The cost of using the dynamic shift insns (shad, shld) are the same
+ if they are available. If they are not available a library function will
+@@ -1747,6 +1755,7 @@ enum processor_type {
+ PROCESSOR_SH2,
+ PROCESSOR_SH2E,
+ PROCESSOR_SH2A,
++ PROCESSOR_SHJ2,
+ PROCESSOR_SH3,
+ PROCESSOR_SH3E,
+ PROCESSOR_SH4,
+diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
+index 908603b92e1..e6108dabbc6 100644
+--- a/gcc/config/sh/sh.opt
++++ b/gcc/config/sh/sh.opt
+@@ -65,6 +65,10 @@ m2e
+ Target RejectNegative Condition(SUPPORT_SH2E)
+ Generate SH2e code.
+
++mj2
++Target RejectNegative Mask(SHJ2) Condition(SUPPORT_SHJ2)
++Generate J2 code.
++
+ m3
+ Target RejectNegative Mask(SH3) Condition(SUPPORT_SH3)
+ Generate SH3 code.
+diff --git a/gcc/config/sh/sync.md b/gcc/config/sh/sync.md
+index 25f3b695d2f..55119386a18 100644
+--- a/gcc/config/sh/sync.md
++++ b/gcc/config/sh/sync.md
+@@ -240,6 +240,9 @@
+ || (TARGET_SH4A && <MODE>mode == SImode && !TARGET_ATOMIC_STRICT))
+ atomic_insn = gen_atomic_compare_and_swap<mode>_hard (old_val, mem,
+ exp_val, new_val);
++ else if (TARGET_ATOMIC_HARD_CAS && <MODE>mode == SImode)
++ atomic_insn = gen_atomic_compare_and_swap<mode>_cas (old_val, mem,
++ exp_val, new_val);
+ else if (TARGET_ATOMIC_SOFT_GUSA)
+ atomic_insn = gen_atomic_compare_and_swap<mode>_soft_gusa (old_val, mem,
+ exp_val, new_val);
+@@ -306,6 +309,57 @@
+ }
+ [(set_attr "length" "14")])
+
++(define_expand "atomic_compare_and_swapsi_cas"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")]
++ UNSPECV_CMPXCHG_1))]
++ "TARGET_ATOMIC_HARD_CAS"
++{
++ rtx mem = gen_rtx_REG (SImode, 0);
++ emit_move_insn (mem, force_reg (SImode, XEXP (operands[1], 0)));
++ emit_insn (gen_shj2_cas (operands[0], mem, operands[2], operands[3]));
++ DONE;
++})
++
++(define_insn "shj2_cas"
++ [(set (match_operand:SI 0 "register_operand" "=&r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "register_operand" "=r")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "0")]
++ UNSPECV_CMPXCHG_1))
++ (set (reg:SI T_REG)
++ (unspec_volatile:SI [(const_int 0)] UNSPECV_CMPXCHG_3))]
++ "TARGET_ATOMIC_HARD_CAS"
++ "cas.l %2,%0,@%1"
++ [(set_attr "length" "2")]
++)
++
++(define_expand "atomic_compare_and_swapqi_cas"
++ [(set (match_operand:SI 0 "arith_reg_dest" "=&r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
++ (match_operand:SI 2 "arith_operand" "rI08")
++ (match_operand:SI 3 "arith_operand" "rI08")]
++ UNSPECV_CMPXCHG_1))]
++ "TARGET_ATOMIC_HARD_CAS"
++{FAIL;}
++)
++
++(define_expand "atomic_compare_and_swaphi_cas"
++ [(set (match_operand:SI 0 "arith_reg_dest" "=&r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
++ (match_operand:SI 2 "arith_operand" "rI08")
++ (match_operand:SI 3 "arith_operand" "rI08")]
++ UNSPECV_CMPXCHG_1))]
++ "TARGET_ATOMIC_HARD_CAS"
++{FAIL;}
++)
++
+ ;; The QIHImode llcs patterns modify the address register of the memory
+ ;; operand. In order to express that, we have to open code the memory
+ ;; operand. Initially the insn is expanded like every other atomic insn
+diff --git a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh
+index a402359be72..dbd0bf992bf 100644
+--- a/gcc/config/sh/t-sh
++++ b/gcc/config/sh/t-sh
+@@ -50,7 +50,8 @@ MULTILIB_MATCHES = $(shell \
+ m2e,m3e,m4-single-only,m4-100-single-only,m4-200-single-only,m4-300-single-only,m4a-single-only \
+ m2a-single,m2a-single-only \
+ m4-single,m4-100-single,m4-200-single,m4-300-single,m4a-single \
+- m4,m4-100,m4-200,m4-300,m4a; do \
++ m4,m4-100,m4-200,m4-300,m4a \
++ mj2; do \
+ subst= ; \
+ for lib in `echo $$abi|tr , ' '` ; do \
+ if test "`echo $$multilibs|sed s/$$lib//`" != "$$multilibs"; then \
+@@ -63,9 +64,9 @@ MULTILIB_MATCHES = $(shell \
+
+ # SH1 and SH2A support big endian only.
+ ifeq ($(DEFAULT_ENDIAN),ml)
+-MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
++MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG)
+ else
+-MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
++MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG)
+ endif
+
+ MULTILIB_OSDIRNAMES = \
+@@ -87,7 +88,8 @@ MULTILIB_OSDIRNAMES = \
+ m4a-single-only=!m4a-single-only $(OTHER_ENDIAN)/m4a-single-only=!$(OTHER_ENDIAN)/m4a-single-only \
+ m4a-single=!m4a-single $(OTHER_ENDIAN)/m4a-single=!$(OTHER_ENDIAN)/m4a-single \
+ m4a=!m4a $(OTHER_ENDIAN)/m4a=!$(OTHER_ENDIAN)/m4a \
+- m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al
++ m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al \
++ mj2=!j2
+
+ $(out_object_file): gt-sh.h
+ gt-sh.h : s-gtype ; @true
diff --git a/musl/patches-in-mcm/gcc-10.1.0/0004-static-pie.diff b/musl/patches-in-mcm/gcc-10.1.0/0004-static-pie.diff
new file mode 100644
index 0000000..a2ec71e
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-10.1.0/0004-static-pie.diff
@@ -0,0 +1,92 @@
+diff --git a/gcc/common.opt b/gcc/common.opt
+index 65a82410abc..c74e57ba075 100644
+--- a/gcc/common.opt
++++ b/gcc/common.opt
+@@ -3391,11 +3391,11 @@ Driver
+
+ no-pie
+ Driver RejectNegative Negative(shared)
+-Don't create a dynamically linked position independent executable.
++Don't create a position independent executable.
+
+ pie
+ Driver RejectNegative Negative(no-pie)
+-Create a dynamically linked position independent executable.
++Create a position independent executable.
+
+ static-pie
+ Driver RejectNegative Negative(pie)
+diff --git a/gcc/config/gnu-user.h b/gcc/config/gnu-user.h
+index ff2e880b1fa..bafde149202 100644
+--- a/gcc/config/gnu-user.h
++++ b/gcc/config/gnu-user.h
+@@ -51,13 +51,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ #define GNU_USER_TARGET_STARTFILE_SPEC \
+ "%{shared:; \
+ pg|p|profile:%{static-pie:grcrt1.o%s;:gcrt1.o%s}; \
+- static:crt1.o%s; \
+- static-pie:rcrt1.o%s; \
++ static|static-pie:%{" PIE_SPEC ":rcrt1.o%s;:crt1.o%s}; \
+ " PIE_SPEC ":Scrt1.o%s; \
+ :crt1.o%s} " \
+ GNU_USER_TARGET_CRTI " \
+- %{static:crtbeginT.o%s; \
+- shared|static-pie|" PIE_SPEC ":crtbeginS.o%s; \
++ %{shared|" PIE_SPEC ":crtbeginS.o%s; \
++ static:crtbeginT.o%s; \
+ :crtbegin.o%s} \
+ %{fvtable-verify=none:%s; \
+ fvtable-verify=preinit:vtv_start_preinit.o%s; \
+@@ -73,11 +72,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ GNU userspace "finalizer" file, `crtn.o'. */
+
+ #define GNU_USER_TARGET_ENDFILE_SPEC \
+- "%{!static:%{fvtable-verify=none:%s; \
++ "%{static|static-pie:; \
++ fvtable-verify=none:%s; \
+ fvtable-verify=preinit:vtv_end_preinit.o%s; \
+- fvtable-verify=std:vtv_end.o%s}} \
+- %{static:crtend.o%s; \
+- shared|static-pie|" PIE_SPEC ":crtendS.o%s; \
++ fvtable-verify=std:vtv_end.o%s} \
++ %{shared|" PIE_SPEC ":crtendS.o%s; \
+ :crtend.o%s} " \
+ GNU_USER_TARGET_CRTN " " \
+ CRTOFFLOADEND
+@@ -106,7 +105,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ #define LIB_SPEC GNU_USER_TARGET_LIB_SPEC
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static|static-pie:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static|" PIE_SPEC ":--eh-frame-hdr} "
+ #endif
+
+ #define GNU_USER_TARGET_LINK_GCC_C_SEQUENCE_SPEC \
+diff --git a/gcc/gcc.c b/gcc/gcc.c
+index e6887590ae2..df6e3965f13 100644
+--- a/gcc/gcc.c
++++ b/gcc/gcc.c
+@@ -907,7 +907,7 @@ proper position among the other output files. */
+ #define NO_FPIE_AND_FPIC_SPEC NO_FPIE_SPEC "|" NO_FPIC_SPEC
+ #define FPIE_OR_FPIC_SPEC NO_FPIE_AND_FPIC_SPEC ":;"
+ #else
+-#define PIE_SPEC "pie"
++#define PIE_SPEC "pie|static-pie"
+ #define FPIE1_SPEC "fpie"
+ #define NO_FPIE1_SPEC FPIE1_SPEC ":;"
+ #define FPIE2_SPEC "fPIE"
+@@ -931,12 +931,12 @@ proper position among the other output files. */
+ #ifndef LINK_PIE_SPEC
+ #ifdef HAVE_LD_PIE
+ #ifndef LD_PIE_SPEC
+-#define LD_PIE_SPEC "-pie"
++#define LD_PIE_SPEC "-pie %{static|static-pie:--no-dynamic-linker -z text -Bsymbolic}"
+ #endif
+ #else
+ #define LD_PIE_SPEC ""
+ #endif
+-#define LINK_PIE_SPEC "%{static|shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
++#define LINK_PIE_SPEC "%{shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
+ #endif
+
+ #ifndef LINK_BUILDID_SPEC
diff --git a/musl/patches-in-mcm/gcc-10.2.0 b/musl/patches-in-mcm/gcc-10.2.0
new file mode 120000
index 0000000..af23fc4
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-10.2.0
@@ -0,0 +1 @@
+gcc-10.1.0 \ No newline at end of file
diff --git a/musl/patches-in-mcm/gcc-10.3.0 b/musl/patches-in-mcm/gcc-10.3.0
new file mode 120000
index 0000000..af23fc4
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-10.3.0
@@ -0,0 +1 @@
+gcc-10.1.0 \ No newline at end of file
diff --git a/musl/patches-in-mcm/gcc-11.1.0 b/musl/patches-in-mcm/gcc-11.1.0
new file mode 120000
index 0000000..af23fc4
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.1.0
@@ -0,0 +1 @@
+gcc-10.1.0 \ No newline at end of file
diff --git a/musl/patches-in-mcm/gcc-11.2.0/0000-nostdinc.diff b/musl/patches-in-mcm/gcc-11.2.0/0000-nostdinc.diff
new file mode 100644
index 0000000..f1ec338
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.2.0/0000-nostdinc.diff
@@ -0,0 +1,26 @@
+diff --git a/configure b/configure
+index 6157a8c87fb..2a4a05b4edf 100755
+--- a/configure
++++ b/configure
+@@ -16653,7 +16653,7 @@ else
+ fi
+
+
+-RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
++RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET -nostdinc++"
+
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking where to find the target ar" >&5
+ $as_echo_n "checking where to find the target ar... " >&6; }
+diff --git a/configure.ac b/configure.ac
+index 2ff48941754..01ecc8c42d9 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -3515,7 +3515,7 @@ ACX_CHECK_INSTALLED_TARGET_TOOL(STRIP_FOR_TARGET, strip)
+ ACX_CHECK_INSTALLED_TARGET_TOOL(WINDRES_FOR_TARGET, windres)
+ ACX_CHECK_INSTALLED_TARGET_TOOL(WINDMC_FOR_TARGET, windmc)
+
+-RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
++RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET -nostdinc++"
+
+ GCC_TARGET_TOOL(ar, AR_FOR_TARGET, AR, [binutils/ar])
+ GCC_TARGET_TOOL(as, AS_FOR_TARGET, AS, [gas/as-new])
diff --git a/musl/patches-in-mcm/gcc-11.2.0/0001-ssp_nonshared.diff b/musl/patches-in-mcm/gcc-11.2.0/0001-ssp_nonshared.diff
new file mode 100644
index 0000000..0b991d9
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.2.0/0001-ssp_nonshared.diff
@@ -0,0 +1,14 @@
+diff --git a/gcc/gcc.c b/gcc/gcc.c
+index 7837553958b..3c81c5798d8 100644
+--- a/gcc/gcc.c
++++ b/gcc/gcc.c
+@@ -980,7 +980,8 @@ proper position among the other output files. */
+ #ifndef LINK_SSP_SPEC
+ #ifdef TARGET_LIBC_PROVIDES_SSP
+ #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
+- "|fstack-protector-strong|fstack-protector-explicit:}"
++ "|fstack-protector-strong|fstack-protector-explicit" \
++ ":-lssp_nonshared}"
+ #else
+ #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
+ "|fstack-protector-strong|fstack-protector-explicit" \
diff --git a/musl/patches-in-mcm/gcc-11.2.0/0002-posix_memalign.diff b/musl/patches-in-mcm/gcc-11.2.0/0002-posix_memalign.diff
new file mode 100644
index 0000000..1d80096
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.2.0/0002-posix_memalign.diff
@@ -0,0 +1,30 @@
+diff --git a/gcc/config/i386/pmm_malloc.h b/gcc/config/i386/pmm_malloc.h
+index 1b0bfe37852..d7b2b19bb3c 100644
+--- a/gcc/config/i386/pmm_malloc.h
++++ b/gcc/config/i386/pmm_malloc.h
+@@ -27,12 +27,13 @@
+ #include <stdlib.h>
+
+ /* We can't depend on <stdlib.h> since the prototype of posix_memalign
+- may not be visible. */
++ may not be visible and we can't pollute the namespace either. */
+ #ifndef __cplusplus
+-extern int posix_memalign (void **, size_t, size_t);
++extern int _mm_posix_memalign (void **, size_t, size_t)
+ #else
+-extern "C" int posix_memalign (void **, size_t, size_t) throw ();
++extern "C" int _mm_posix_memalign (void **, size_t, size_t) throw ()
+ #endif
++__asm__("posix_memalign");
+
+ static __inline void *
+ _mm_malloc (size_t __size, size_t __alignment)
+@@ -42,7 +43,7 @@ _mm_malloc (size_t __size, size_t __alignment)
+ return malloc (__size);
+ if (__alignment == 2 || (sizeof (void *) == 8 && __alignment == 4))
+ __alignment = sizeof (void *);
+- if (posix_memalign (&__ptr, __alignment, __size) == 0)
++ if (_mm_posix_memalign (&__ptr, __alignment, __size) == 0)
+ return __ptr;
+ else
+ return NULL;
diff --git a/musl/patches-in-mcm/gcc-11.2.0/0003-j2.diff b/musl/patches-in-mcm/gcc-11.2.0/0003-j2.diff
new file mode 100644
index 0000000..245b910
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.2.0/0003-j2.diff
@@ -0,0 +1,346 @@
+diff --git a/gcc/config.gcc b/gcc/config.gcc
+index 357b0bed067..528add999f2 100644
+--- a/gcc/config.gcc
++++ b/gcc/config.gcc
+@@ -556,7 +556,7 @@ s390*-*-*)
+ extra_headers="s390intrin.h htmintrin.h htmxlintrin.h vecintrin.h"
+ ;;
+ # Note the 'l'; we need to be able to match e.g. "shle" or "shl".
+-sh[123456789lbe]*-*-* | sh-*-*)
++sh[123456789lbej]*-*-* | sh-*-*)
+ cpu_type=sh
+ extra_options="${extra_options} fused-madd.opt"
+ extra_objs="${extra_objs} sh_treg_combine.o sh-mem.o sh_optimize_sett_clrt.o"
+@@ -3202,18 +3202,18 @@ s390x-ibm-tpf*)
+ extra_options="${extra_options} s390/tpf.opt"
+ tmake_file="${tmake_file} s390/t-s390"
+ ;;
+-sh-*-elf* | sh[12346l]*-*-elf* | \
+- sh-*-linux* | sh[2346lbe]*-*-linux* | \
++sh-*-elf* | sh[12346lj]*-*-elf* | \
++ sh-*-linux* | sh[2346lbej]*-*-linux* | \
+ sh-*-netbsdelf* | shl*-*-netbsdelf*)
+ tmake_file="${tmake_file} sh/t-sh sh/t-elf"
+ if test x${with_endian} = x; then
+ case ${target} in
+- sh[1234]*be-*-* | sh[1234]*eb-*-*) with_endian=big ;;
++ sh[j1234]*be-*-* | sh[j1234]*eb-*-*) with_endian=big ;;
+ shbe-*-* | sheb-*-*) with_endian=big,little ;;
+ sh[1234]l* | sh[34]*-*-linux*) with_endian=little ;;
+ shl* | sh*-*-linux* | \
+ sh-superh-elf) with_endian=little,big ;;
+- sh[1234]*-*-*) with_endian=big ;;
++ sh[j1234]*-*-*) with_endian=big ;;
+ *) with_endian=big,little ;;
+ esac
+ fi
+@@ -3280,6 +3280,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ sh2a_nofpu*) sh_cpu_target=sh2a-nofpu ;;
+ sh2a*) sh_cpu_target=sh2a ;;
+ sh2e*) sh_cpu_target=sh2e ;;
++ shj2*) sh_cpu_target=shj2;;
+ sh2*) sh_cpu_target=sh2 ;;
+ *) sh_cpu_target=sh1 ;;
+ esac
+@@ -3301,7 +3302,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ sh2a-single-only | sh2a-single | sh2a-nofpu | sh2a | \
+ sh4a-single-only | sh4a-single | sh4a-nofpu | sh4a | sh4al | \
+ sh4-single-only | sh4-single | sh4-nofpu | sh4 | sh4-300 | \
+- sh3e | sh3 | sh2e | sh2 | sh1) ;;
++ sh3e | sh3 | sh2e | sh2 | sh1 | shj2) ;;
+ "") sh_cpu_default=${sh_cpu_target} ;;
+ *) echo "with_cpu=$with_cpu not supported"; exit 1 ;;
+ esac
+@@ -3310,9 +3311,9 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ case ${target} in
+ sh[1234]*) sh_multilibs=${sh_cpu_target} ;;
+ sh-superh-*) sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
+- sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4 ;;
++ sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4,mj2 ;;
+ sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;;
+- *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;;
++ *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single,mj2 ;;
+ esac
+ if test x$with_fp = xno; then
+ sh_multilibs="`echo $sh_multilibs|sed -e s/m4/sh4-nofpu/ -e s/,m4-[^,]*//g -e s/,m[23]e// -e s/m2a,m2a-single/m2a-nofpu/ -e s/m5-..m....,//g`"
+@@ -3327,7 +3328,8 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ m1 | m2 | m2e | m3 | m3e | \
+ m4 | m4-single | m4-single-only | m4-nofpu | m4-300 |\
+ m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al | \
+- m2a | m2a-single | m2a-single-only | m2a-nofpu)
++ m2a | m2a-single | m2a-single-only | m2a-nofpu | \
++ mj2)
+ # TM_MULTILIB_CONFIG is used by t-sh for the non-endian multilib definition
+ # It is passed to MULTIILIB_OPTIONS verbatim.
+ TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG}/${sh_multilib}"
+@@ -3344,7 +3346,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
+ done
+ TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's:^/::'`
+ if test x${enable_incomplete_targets} = xyes ; then
+- tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1"
++ tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1 SUPPORT_SHJ2=1"
+ fi
+ tm_file="$tm_file ./sysroot-suffix.h"
+ tmake_file="$tmake_file t-sysroot-suffix"
+@@ -5175,6 +5177,8 @@ case "${target}" in
+ ;;
+ m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al)
+ ;;
++ mj2)
++ ;;
+ *)
+ echo "Unknown CPU used in --with-cpu=$with_cpu, known values:" 1>&2
+ echo "m1 m2 m2e m3 m3e m4 m4-single m4-single-only m4-nofpu" 1>&2
+@@ -5385,7 +5389,7 @@ case ${target} in
+ tmake_file="${cpu_type}/t-${cpu_type} ${tmake_file}"
+ ;;
+
+- sh[123456ble]*-*-* | sh-*-*)
++ sh[123456blej]*-*-* | sh-*-*)
+ c_target_objs="${c_target_objs} sh-c.o"
+ cxx_target_objs="${cxx_target_objs} sh-c.o"
+ ;;
+diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
+index 1564109c942..798c1c1c1a3 100644
+--- a/gcc/config/sh/sh.c
++++ b/gcc/config/sh/sh.c
+@@ -686,6 +686,7 @@ parse_validate_atomic_model_option (const char* str)
+ model_names[sh_atomic_model::hard_llcs] = "hard-llcs";
+ model_names[sh_atomic_model::soft_tcb] = "soft-tcb";
+ model_names[sh_atomic_model::soft_imask] = "soft-imask";
++ model_names[sh_atomic_model::hard_cas] = "hard-cas";
+
+ const char* model_cdef_names[sh_atomic_model::num_models];
+ model_cdef_names[sh_atomic_model::none] = "NONE";
+@@ -693,6 +694,7 @@ parse_validate_atomic_model_option (const char* str)
+ model_cdef_names[sh_atomic_model::hard_llcs] = "HARD_LLCS";
+ model_cdef_names[sh_atomic_model::soft_tcb] = "SOFT_TCB";
+ model_cdef_names[sh_atomic_model::soft_imask] = "SOFT_IMASK";
++ model_cdef_names[sh_atomic_model::hard_cas] = "HARD_CAS";
+
+ sh_atomic_model ret;
+ ret.type = sh_atomic_model::none;
+@@ -771,6 +773,9 @@ got_mode_name:;
+ if (ret.type == sh_atomic_model::soft_imask && TARGET_USERMODE)
+ err_ret ("cannot use atomic model %s in user mode", ret.name);
+
++ if (ret.type == sh_atomic_model::hard_cas && !TARGET_SHJ2)
++ err_ret ("atomic model %s is only available J2 targets", ret.name);
++
+ return ret;
+
+ #undef err_ret
+@@ -827,6 +832,8 @@ sh_option_override (void)
+ sh_cpu = PROCESSOR_SH2E;
+ if (TARGET_SH2A)
+ sh_cpu = PROCESSOR_SH2A;
++ if (TARGET_SHJ2)
++ sh_cpu = PROCESSOR_SHJ2;
+ if (TARGET_SH3)
+ sh_cpu = PROCESSOR_SH3;
+ if (TARGET_SH3E)
+diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
+index d2280e2ffe6..3a54a896721 100644
+--- a/gcc/config/sh/sh.h
++++ b/gcc/config/sh/sh.h
+@@ -85,6 +85,7 @@ extern int code_for_indirect_jump_scratch;
+ #define SUPPORT_SH4_SINGLE 1
+ #define SUPPORT_SH2A 1
+ #define SUPPORT_SH2A_SINGLE 1
++#define SUPPORT_SHJ2 1
+ #endif
+
+ #define TARGET_DIVIDE_CALL_DIV1 (sh_div_strategy == SH_DIV_CALL_DIV1)
+@@ -117,6 +118,7 @@ extern int code_for_indirect_jump_scratch;
+ #define SELECT_SH4A_SINGLE_ONLY (MASK_SH4A | SELECT_SH4_SINGLE_ONLY)
+ #define SELECT_SH4A (MASK_SH4A | SELECT_SH4)
+ #define SELECT_SH4A_SINGLE (MASK_SH4A | SELECT_SH4_SINGLE)
++#define SELECT_SHJ2 (MASK_SHJ2 | SELECT_SH2)
+
+ #if SUPPORT_SH1
+ #define SUPPORT_SH2 1
+@@ -124,6 +126,7 @@ extern int code_for_indirect_jump_scratch;
+ #if SUPPORT_SH2
+ #define SUPPORT_SH3 1
+ #define SUPPORT_SH2A_NOFPU 1
++#define SUPPORT_SHJ2 1
+ #endif
+ #if SUPPORT_SH3
+ #define SUPPORT_SH4_NOFPU 1
+@@ -156,7 +159,7 @@ extern int code_for_indirect_jump_scratch;
+ #define MASK_ARCH (MASK_SH1 | MASK_SH2 | MASK_SH3 | MASK_SH_E | MASK_SH4 \
+ | MASK_HARD_SH2A | MASK_HARD_SH2A_DOUBLE | MASK_SH4A \
+ | MASK_HARD_SH4 | MASK_FPU_SINGLE \
+- | MASK_FPU_SINGLE_ONLY)
++ | MASK_FPU_SINGLE_ONLY | MASK_SHJ2)
+
+ /* This defaults us to big-endian. */
+ #ifndef TARGET_ENDIAN_DEFAULT
+@@ -231,7 +234,8 @@ extern int code_for_indirect_jump_scratch;
+ %{m2a-single:--isa=sh2a} \
+ %{m2a-single-only:--isa=sh2a} \
+ %{m2a-nofpu:--isa=sh2a-nofpu} \
+-%{m4al:-dsp}"
++%{m4al:-dsp} \
++%{mj2:-isa=j2}"
+
+ #define ASM_SPEC SH_ASM_SPEC
+
+@@ -347,6 +351,7 @@ struct sh_atomic_model
+ hard_llcs,
+ soft_tcb,
+ soft_imask,
++ hard_cas,
+
+ num_models
+ };
+@@ -390,6 +395,9 @@ extern const sh_atomic_model& selected_atomic_model (void);
+ #define TARGET_ATOMIC_SOFT_IMASK \
+ (selected_atomic_model ().type == sh_atomic_model::soft_imask)
+
++#define TARGET_ATOMIC_HARD_CAS \
++ (selected_atomic_model ().type == sh_atomic_model::hard_cas)
++
+ #endif // __cplusplus
+
+ #define SUBTARGET_OVERRIDE_OPTIONS (void) 0
+@@ -1484,7 +1492,7 @@ extern bool current_function_interrupt;
+
+ /* Nonzero if the target supports dynamic shift instructions
+ like shad and shld. */
+-#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A)
++#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A || TARGET_SHJ2)
+
+ /* The cost of using the dynamic shift insns (shad, shld) are the same
+ if they are available. If they are not available a library function will
+@@ -1747,6 +1755,7 @@ enum processor_type {
+ PROCESSOR_SH2,
+ PROCESSOR_SH2E,
+ PROCESSOR_SH2A,
++ PROCESSOR_SHJ2,
+ PROCESSOR_SH3,
+ PROCESSOR_SH3E,
+ PROCESSOR_SH4,
+diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
+index b4755a812f3..0989a1c18da 100644
+--- a/gcc/config/sh/sh.opt
++++ b/gcc/config/sh/sh.opt
+@@ -65,6 +65,10 @@ m2e
+ Target RejectNegative Condition(SUPPORT_SH2E)
+ Generate SH2e code.
+
++mj2
++Target RejectNegative Mask(SHJ2) Condition(SUPPORT_SHJ2)
++Generate J2 code.
++
+ m3
+ Target RejectNegative Mask(SH3) Condition(SUPPORT_SH3)
+ Generate SH3 code.
+diff --git a/gcc/config/sh/sync.md b/gcc/config/sh/sync.md
+index 2b43f8edb86..118fc5d06db 100644
+--- a/gcc/config/sh/sync.md
++++ b/gcc/config/sh/sync.md
+@@ -240,6 +240,9 @@
+ || (TARGET_SH4A && <MODE>mode == SImode && !TARGET_ATOMIC_STRICT))
+ atomic_insn = gen_atomic_compare_and_swap<mode>_hard (old_val, mem,
+ exp_val, new_val);
++ else if (TARGET_ATOMIC_HARD_CAS && <MODE>mode == SImode)
++ atomic_insn = gen_atomic_compare_and_swap<mode>_cas (old_val, mem,
++ exp_val, new_val);
+ else if (TARGET_ATOMIC_SOFT_GUSA)
+ atomic_insn = gen_atomic_compare_and_swap<mode>_soft_gusa (old_val, mem,
+ exp_val, new_val);
+@@ -306,6 +309,57 @@
+ }
+ [(set_attr "length" "14")])
+
++(define_expand "atomic_compare_and_swapsi_cas"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")]
++ UNSPECV_CMPXCHG_1))]
++ "TARGET_ATOMIC_HARD_CAS"
++{
++ rtx mem = gen_rtx_REG (SImode, 0);
++ emit_move_insn (mem, force_reg (SImode, XEXP (operands[1], 0)));
++ emit_insn (gen_shj2_cas (operands[0], mem, operands[2], operands[3]));
++ DONE;
++})
++
++(define_insn "shj2_cas"
++ [(set (match_operand:SI 0 "register_operand" "=&r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "register_operand" "=r")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "0")]
++ UNSPECV_CMPXCHG_1))
++ (set (reg:SI T_REG)
++ (unspec_volatile:SI [(const_int 0)] UNSPECV_CMPXCHG_3))]
++ "TARGET_ATOMIC_HARD_CAS"
++ "cas.l %2,%0,@%1"
++ [(set_attr "length" "2")]
++)
++
++(define_expand "atomic_compare_and_swapqi_cas"
++ [(set (match_operand:SI 0 "arith_reg_dest" "=&r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
++ (match_operand:SI 2 "arith_operand" "rI08")
++ (match_operand:SI 3 "arith_operand" "rI08")]
++ UNSPECV_CMPXCHG_1))]
++ "TARGET_ATOMIC_HARD_CAS"
++{FAIL;}
++)
++
++(define_expand "atomic_compare_and_swaphi_cas"
++ [(set (match_operand:SI 0 "arith_reg_dest" "=&r")
++ (unspec_volatile:SI
++ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
++ (match_operand:SI 2 "arith_operand" "rI08")
++ (match_operand:SI 3 "arith_operand" "rI08")]
++ UNSPECV_CMPXCHG_1))]
++ "TARGET_ATOMIC_HARD_CAS"
++{FAIL;}
++)
++
+ ;; The QIHImode llcs patterns modify the address register of the memory
+ ;; operand. In order to express that, we have to open code the memory
+ ;; operand. Initially the insn is expanded like every other atomic insn
+diff --git a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh
+index 888f8ff7f25..29fd6ae45fd 100644
+--- a/gcc/config/sh/t-sh
++++ b/gcc/config/sh/t-sh
+@@ -50,7 +50,8 @@ MULTILIB_MATCHES = $(shell \
+ m2e,m3e,m4-single-only,m4-100-single-only,m4-200-single-only,m4-300-single-only,m4a-single-only \
+ m2a-single,m2a-single-only \
+ m4-single,m4-100-single,m4-200-single,m4-300-single,m4a-single \
+- m4,m4-100,m4-200,m4-300,m4a; do \
++ m4,m4-100,m4-200,m4-300,m4a \
++ mj2; do \
+ subst= ; \
+ for lib in `echo $$abi|tr , ' '` ; do \
+ if test "`echo $$multilibs|sed s/$$lib//`" != "$$multilibs"; then \
+@@ -63,9 +64,9 @@ MULTILIB_MATCHES = $(shell \
+
+ # SH1 and SH2A support big endian only.
+ ifeq ($(DEFAULT_ENDIAN),ml)
+-MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
++MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG)
+ else
+-MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
++MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG)
+ endif
+
+ MULTILIB_OSDIRNAMES = \
+@@ -87,7 +88,8 @@ MULTILIB_OSDIRNAMES = \
+ m4a-single-only=!m4a-single-only $(OTHER_ENDIAN)/m4a-single-only=!$(OTHER_ENDIAN)/m4a-single-only \
+ m4a-single=!m4a-single $(OTHER_ENDIAN)/m4a-single=!$(OTHER_ENDIAN)/m4a-single \
+ m4a=!m4a $(OTHER_ENDIAN)/m4a=!$(OTHER_ENDIAN)/m4a \
+- m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al
++ m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al \
++ mj2=!j2
+
+ $(out_object_file): gt-sh.h
+ gt-sh.h : s-gtype ; @true
diff --git a/musl/patches-in-mcm/gcc-11.2.0/0004-static-pie.diff b/musl/patches-in-mcm/gcc-11.2.0/0004-static-pie.diff
new file mode 100644
index 0000000..232dc5d
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.2.0/0004-static-pie.diff
@@ -0,0 +1,92 @@
+diff --git a/gcc/common.opt b/gcc/common.opt
+index a75b44ee47e..7c564818b49 100644
+--- a/gcc/common.opt
++++ b/gcc/common.opt
+@@ -3473,11 +3473,11 @@ Driver
+
+ no-pie
+ Driver RejectNegative Negative(shared)
+-Don't create a dynamically linked position independent executable.
++Don't create a position independent executable.
+
+ pie
+ Driver RejectNegative Negative(no-pie)
+-Create a dynamically linked position independent executable.
++Create a position independent executable.
+
+ static-pie
+ Driver RejectNegative Negative(pie)
+diff --git a/gcc/config/gnu-user.h b/gcc/config/gnu-user.h
+index 5ebbf42a13d..bb907d8e89a 100644
+--- a/gcc/config/gnu-user.h
++++ b/gcc/config/gnu-user.h
+@@ -51,13 +51,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ #define GNU_USER_TARGET_STARTFILE_SPEC \
+ "%{shared:; \
+ pg|p|profile:%{static-pie:grcrt1.o%s;:gcrt1.o%s}; \
+- static:crt1.o%s; \
+- static-pie:rcrt1.o%s; \
++ static|static-pie:%{" PIE_SPEC ":rcrt1.o%s;:crt1.o%s}; \
+ " PIE_SPEC ":Scrt1.o%s; \
+ :crt1.o%s} " \
+ GNU_USER_TARGET_CRTI " \
+- %{static:crtbeginT.o%s; \
+- shared|static-pie|" PIE_SPEC ":crtbeginS.o%s; \
++ %{shared|" PIE_SPEC ":crtbeginS.o%s; \
++ static:crtbeginT.o%s; \
+ :crtbegin.o%s} \
+ %{fvtable-verify=none:%s; \
+ fvtable-verify=preinit:vtv_start_preinit.o%s; \
+@@ -73,11 +72,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ GNU userspace "finalizer" file, `crtn.o'. */
+
+ #define GNU_USER_TARGET_ENDFILE_SPEC \
+- "%{!static:%{fvtable-verify=none:%s; \
++ "%{static|static-pie:; \
++ fvtable-verify=none:%s; \
+ fvtable-verify=preinit:vtv_end_preinit.o%s; \
+- fvtable-verify=std:vtv_end.o%s}} \
+- %{static:crtend.o%s; \
+- shared|static-pie|" PIE_SPEC ":crtendS.o%s; \
++ fvtable-verify=std:vtv_end.o%s} \
++ %{shared|" PIE_SPEC ":crtendS.o%s; \
+ :crtend.o%s} " \
+ GNU_USER_TARGET_CRTN " " \
+ CRTOFFLOADEND
+@@ -106,7 +105,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ #define LIB_SPEC GNU_USER_TARGET_LIB_SPEC
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static|static-pie:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static|" PIE_SPEC ":--eh-frame-hdr} "
+ #endif
+
+ #define GNU_USER_TARGET_LINK_GCC_C_SEQUENCE_SPEC \
+diff --git a/gcc/gcc.c b/gcc/gcc.c
+index 3c81c5798d8..cd96eac5d12 100644
+--- a/gcc/gcc.c
++++ b/gcc/gcc.c
+@@ -1010,7 +1010,7 @@ proper position among the other output files. */
+ #define NO_FPIE_AND_FPIC_SPEC NO_FPIE_SPEC "|" NO_FPIC_SPEC
+ #define FPIE_OR_FPIC_SPEC NO_FPIE_AND_FPIC_SPEC ":;"
+ #else
+-#define PIE_SPEC "pie"
++#define PIE_SPEC "pie|static-pie"
+ #define FPIE1_SPEC "fpie"
+ #define NO_FPIE1_SPEC FPIE1_SPEC ":;"
+ #define FPIE2_SPEC "fPIE"
+@@ -1034,12 +1034,12 @@ proper position among the other output files. */
+ #ifndef LINK_PIE_SPEC
+ #ifdef HAVE_LD_PIE
+ #ifndef LD_PIE_SPEC
+-#define LD_PIE_SPEC "-pie"
++#define LD_PIE_SPEC "-pie %{static|static-pie:--no-dynamic-linker -z text -Bsymbolic}"
+ #endif
+ #else
+ #define LD_PIE_SPEC ""
+ #endif
+-#define LINK_PIE_SPEC "%{static|shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
++#define LINK_PIE_SPEC "%{shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
+ #endif
+
+ #ifndef LINK_BUILDID_SPEC
diff --git a/musl/patches-in-mcm/gcc-11.2.0/0005-m68k-sqrt.diff b/musl/patches-in-mcm/gcc-11.2.0/0005-m68k-sqrt.diff
new file mode 100644
index 0000000..652efb1
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.2.0/0005-m68k-sqrt.diff
@@ -0,0 +1,20 @@
+diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
+index 59a456cd496..dbfddea41bd 100644
+--- a/gcc/config/m68k/m68k.md
++++ b/gcc/config/m68k/m68k.md
+@@ -4174,13 +4174,13 @@
+ (define_expand "sqrt<mode>2"
+ [(set (match_operand:FP 0 "nonimmediate_operand" "")
+ (sqrt:FP (match_operand:FP 1 "general_operand" "")))]
+- "TARGET_HARD_FLOAT"
++ "(TARGET_68881 && TARGET_68040) || TARGET_COLDFIRE_FPU"
+ "")
+
+ (define_insn "sqrt<mode>2_68881"
+ [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
+ (sqrt:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m")))]
+- "TARGET_68881"
++ "TARGET_68881 && TARGET_68040"
+ {
+ if (FP_REG_P (operands[1]))
+ return "f<FP:round>sqrt%.x %1,%0";
diff --git a/musl/patches-in-mcm/gcc-11.2.0/0006-s390x-no-multilib.diff b/musl/patches-in-mcm/gcc-11.2.0/0006-s390x-no-multilib.diff
new file mode 100644
index 0000000..852deb7
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.2.0/0006-s390x-no-multilib.diff
@@ -0,0 +1,12 @@
+diff --git a/gcc/config/s390/t-linux64 b/gcc/config/s390/t-linux64
+index cc6ab367072..7f498ee1cdc 100644
+--- a/gcc/config/s390/t-linux64
++++ b/gcc/config/s390/t-linux64
+@@ -7,5 +7,5 @@
+
+ MULTILIB_OPTIONS = m64/m31
+ MULTILIB_DIRNAMES = 64 32
+-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu)
+-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu)
++MULTILIB_OSDIRNAMES = m64=../lib
++MULTILIB_OSDIRNAMES+= m32=../lib32
diff --git a/musl/patches-in-mcm/gcc-11.3.0 b/musl/patches-in-mcm/gcc-11.3.0
new file mode 120000
index 0000000..82c2c4b
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-11.3.0
@@ -0,0 +1 @@
+gcc-11.2.0 \ No newline at end of file
diff --git a/musl/patches-in-mcm/gcc-12.2.0/0000-nostdinc.diff b/musl/patches-in-mcm/gcc-12.2.0/0000-nostdinc.diff
new file mode 100644
index 0000000..f1ec338
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-12.2.0/0000-nostdinc.diff
@@ -0,0 +1,26 @@
+diff --git a/configure b/configure
+index 6157a8c87fb..2a4a05b4edf 100755
+--- a/configure
++++ b/configure
+@@ -16653,7 +16653,7 @@ else
+ fi
+
+
+-RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
++RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET -nostdinc++"
+
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking where to find the target ar" >&5
+ $as_echo_n "checking where to find the target ar... " >&6; }
+diff --git a/configure.ac b/configure.ac
+index 2ff48941754..01ecc8c42d9 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -3515,7 +3515,7 @@ ACX_CHECK_INSTALLED_TARGET_TOOL(STRIP_FOR_TARGET, strip)
+ ACX_CHECK_INSTALLED_TARGET_TOOL(WINDRES_FOR_TARGET, windres)
+ ACX_CHECK_INSTALLED_TARGET_TOOL(WINDMC_FOR_TARGET, windmc)
+
+-RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
++RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET -nostdinc++"
+
+ GCC_TARGET_TOOL(ar, AR_FOR_TARGET, AR, [binutils/ar])
+ GCC_TARGET_TOOL(as, AS_FOR_TARGET, AS, [gas/as-new])
diff --git a/musl/patches-in-mcm/gcc-12.2.0/0002-posix_memalign.diff b/musl/patches-in-mcm/gcc-12.2.0/0002-posix_memalign.diff
new file mode 100644
index 0000000..1d80096
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-12.2.0/0002-posix_memalign.diff
@@ -0,0 +1,30 @@
+diff --git a/gcc/config/i386/pmm_malloc.h b/gcc/config/i386/pmm_malloc.h
+index 1b0bfe37852..d7b2b19bb3c 100644
+--- a/gcc/config/i386/pmm_malloc.h
++++ b/gcc/config/i386/pmm_malloc.h
+@@ -27,12 +27,13 @@
+ #include <stdlib.h>
+
+ /* We can't depend on <stdlib.h> since the prototype of posix_memalign
+- may not be visible. */
++ may not be visible and we can't pollute the namespace either. */
+ #ifndef __cplusplus
+-extern int posix_memalign (void **, size_t, size_t);
++extern int _mm_posix_memalign (void **, size_t, size_t)
+ #else
+-extern "C" int posix_memalign (void **, size_t, size_t) throw ();
++extern "C" int _mm_posix_memalign (void **, size_t, size_t) throw ()
+ #endif
++__asm__("posix_memalign");
+
+ static __inline void *
+ _mm_malloc (size_t __size, size_t __alignment)
+@@ -42,7 +43,7 @@ _mm_malloc (size_t __size, size_t __alignment)
+ return malloc (__size);
+ if (__alignment == 2 || (sizeof (void *) == 8 && __alignment == 4))
+ __alignment = sizeof (void *);
+- if (posix_memalign (&__ptr, __alignment, __size) == 0)
++ if (_mm_posix_memalign (&__ptr, __alignment, __size) == 0)
+ return __ptr;
+ else
+ return NULL;
diff --git a/musl/patches-in-mcm/gcc-12.2.0/0005-m68k-sqrt.diff b/musl/patches-in-mcm/gcc-12.2.0/0005-m68k-sqrt.diff
new file mode 100644
index 0000000..652efb1
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-12.2.0/0005-m68k-sqrt.diff
@@ -0,0 +1,20 @@
+diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
+index 59a456cd496..dbfddea41bd 100644
+--- a/gcc/config/m68k/m68k.md
++++ b/gcc/config/m68k/m68k.md
+@@ -4174,13 +4174,13 @@
+ (define_expand "sqrt<mode>2"
+ [(set (match_operand:FP 0 "nonimmediate_operand" "")
+ (sqrt:FP (match_operand:FP 1 "general_operand" "")))]
+- "TARGET_HARD_FLOAT"
++ "(TARGET_68881 && TARGET_68040) || TARGET_COLDFIRE_FPU"
+ "")
+
+ (define_insn "sqrt<mode>2_68881"
+ [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
+ (sqrt:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m")))]
+- "TARGET_68881"
++ "TARGET_68881 && TARGET_68040"
+ {
+ if (FP_REG_P (operands[1]))
+ return "f<FP:round>sqrt%.x %1,%0";
diff --git a/musl/patches-in-mcm/gcc-12.2.0/0006-s390x-no-multilib.diff b/musl/patches-in-mcm/gcc-12.2.0/0006-s390x-no-multilib.diff
new file mode 100644
index 0000000..852deb7
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-12.2.0/0006-s390x-no-multilib.diff
@@ -0,0 +1,12 @@
+diff --git a/gcc/config/s390/t-linux64 b/gcc/config/s390/t-linux64
+index cc6ab367072..7f498ee1cdc 100644
+--- a/gcc/config/s390/t-linux64
++++ b/gcc/config/s390/t-linux64
+@@ -7,5 +7,5 @@
+
+ MULTILIB_OPTIONS = m64/m31
+ MULTILIB_DIRNAMES = 64 32
+-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu)
+-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu)
++MULTILIB_OSDIRNAMES = m64=../lib
++MULTILIB_OSDIRNAMES+= m32=../lib32
diff --git a/musl/patches-in-mcm/gcc-13.1.0 b/musl/patches-in-mcm/gcc-13.1.0
new file mode 120000
index 0000000..8d77606
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.1.0
@@ -0,0 +1 @@
+gcc-12.2.0 \ No newline at end of file
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0000-nostdinc.diff b/musl/patches-in-mcm/gcc-13.2.0/0000-nostdinc.diff
new file mode 100644
index 0000000..f1ec338
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0000-nostdinc.diff
@@ -0,0 +1,26 @@
+diff --git a/configure b/configure
+index 6157a8c87fb..2a4a05b4edf 100755
+--- a/configure
++++ b/configure
+@@ -16653,7 +16653,7 @@ else
+ fi
+
+
+-RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
++RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET -nostdinc++"
+
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking where to find the target ar" >&5
+ $as_echo_n "checking where to find the target ar... " >&6; }
+diff --git a/configure.ac b/configure.ac
+index 2ff48941754..01ecc8c42d9 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -3515,7 +3515,7 @@ ACX_CHECK_INSTALLED_TARGET_TOOL(STRIP_FOR_TARGET, strip)
+ ACX_CHECK_INSTALLED_TARGET_TOOL(WINDRES_FOR_TARGET, windres)
+ ACX_CHECK_INSTALLED_TARGET_TOOL(WINDMC_FOR_TARGET, windmc)
+
+-RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
++RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET -nostdinc++"
+
+ GCC_TARGET_TOOL(ar, AR_FOR_TARGET, AR, [binutils/ar])
+ GCC_TARGET_TOOL(as, AS_FOR_TARGET, AS, [gas/as-new])
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0001-posix_memalign.patch b/musl/patches-in-mcm/gcc-13.2.0/0001-posix_memalign.patch
new file mode 100644
index 0000000..04240c2
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0001-posix_memalign.patch
@@ -0,0 +1,42 @@
+From 47b4bd4deb2c356bb07d2a96f22127aefafec3a4 Mon Sep 17 00:00:00 2001
+From: Szabolcs Nagy <nsz@port70.net>
+Date: Fri, 26 Jan 2018 20:32:50 +0000
+Subject: [PATCH 01/35] posix_memalign
+
+---
+ gcc/config/i386/pmm_malloc.h | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/gcc/config/i386/pmm_malloc.h b/gcc/config/i386/pmm_malloc.h
+index 3527283693b..c4071b64b53 100644
+--- a/gcc/config/i386/pmm_malloc.h
++++ b/gcc/config/i386/pmm_malloc.h
+@@ -27,12 +27,13 @@
+ #include <stdlib.h>
+
+ /* We can't depend on <stdlib.h> since the prototype of posix_memalign
+- may not be visible. */
++ may not be visible and we can't pollute the namespace either. */
+ #ifndef __cplusplus
+-extern int posix_memalign (void **, size_t, size_t);
++extern int _mm_posix_memalign (void **, size_t, size_t)
+ #else
+-extern "C" int posix_memalign (void **, size_t, size_t) throw ();
++extern "C" int _mm_posix_memalign (void **, size_t, size_t) throw ()
+ #endif
++__asm__("posix_memalign");
+
+ static __inline void *
+ _mm_malloc (size_t __size, size_t __alignment)
+@@ -42,7 +43,7 @@ _mm_malloc (size_t __size, size_t __alignment)
+ return malloc (__size);
+ if (__alignment == 2 || (sizeof (void *) == 8 && __alignment == 4))
+ __alignment = sizeof (void *);
+- if (posix_memalign (&__ptr, __alignment, __size) == 0)
++ if (_mm_posix_memalign (&__ptr, __alignment, __size) == 0)
+ return __ptr;
+ else
+ return NULL;
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0002-gcc-poison-system-directories.patch b/musl/patches-in-mcm/gcc-13.2.0/0002-gcc-poison-system-directories.patch
new file mode 100644
index 0000000..b14c921
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0002-gcc-poison-system-directories.patch
@@ -0,0 +1,203 @@
+From 4fa620d8c3e6730211bfb071eb4c817320491bd0 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Fri, 29 Mar 2013 08:59:00 +0400
+Subject: [PATCH 02/35] gcc: poison-system-directories
+
+Add /sw/include and /opt/include based on the original
+zecke-no-host-includes.patch patch. The original patch checked for
+/usr/include, /sw/include and /opt/include and then triggered a failure and
+aborted.
+
+Instead, we add the two missing items to the current scan. If the user
+wants this to be a failure, they can add "-Werror=poison-system-directories".
+
+Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+
+Upstream-Status: Pending
+---
+ gcc/common.opt | 4 ++++
+ gcc/config.in | 6 ++++++
+ gcc/configure | 16 ++++++++++++++++
+ gcc/configure.ac | 10 ++++++++++
+ gcc/doc/invoke.texi | 9 +++++++++
+ gcc/gcc.cc | 2 ++
+ gcc/incpath.cc | 21 +++++++++++++++++++++
+ 7 files changed, 68 insertions(+)
+
+diff --git a/gcc/common.opt b/gcc/common.opt
+index 862c474d3c8..64c4277c991 100644
+--- a/gcc/common.opt
++++ b/gcc/common.opt
+@@ -711,6 +711,10 @@ Wreturn-local-addr
+ Common Var(warn_return_local_addr) Init(1) Warning
+ Warn about returning a pointer/reference to a local or temporary variable.
+
++Wpoison-system-directories
++Common Var(flag_poison_system_directories) Init(1) Warning
++Warn for -I and -L options using system directories if cross compiling
++
+ Wshadow
+ Common Var(warn_shadow) Warning
+ Warn when one variable shadows another. Same as -Wshadow=global.
+diff --git a/gcc/config.in b/gcc/config.in
+index 4cad077bfbe..0679fbbf4c6 100644
+--- a/gcc/config.in
++++ b/gcc/config.in
+@@ -236,6 +236,12 @@
+ #endif
+
+
++/* Define to warn for use of native system header directories */
++#ifndef USED_FOR_TARGET
++#undef ENABLE_POISON_SYSTEM_DIRECTORIES
++#endif
++
++
+ /* Define if you want all operations on RTL (the basic data structure of the
+ optimizer and back end) to be checked for dynamic type safety at runtime.
+ This is quite expensive. */
+diff --git a/gcc/configure b/gcc/configure
+index c7b26d1927d..8c46369f73f 100755
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -1026,6 +1026,7 @@ enable_maintainer_mode
+ enable_link_mutex
+ enable_link_serialization
+ enable_version_specific_runtime_libs
++enable_poison_system_directories
+ enable_plugin
+ enable_host_shared
+ enable_libquadmath_support
+@@ -1788,6 +1789,8 @@ Optional Features:
+ --enable-version-specific-runtime-libs
+ specify that runtime libraries should be installed
+ in a compiler-specific directory
++ --enable-poison-system-directories
++ warn for use of native system header directories
+ --enable-plugin enable plugin support
+ --enable-host-shared build host code as shared libraries
+ --disable-libquadmath-support
+@@ -31753,6 +31756,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then :
+ fi
+
+
++# Check whether --enable-poison-system-directories was given.
++if test "${enable_poison_system_directories+set}" = set; then :
++ enableval=$enable_poison_system_directories;
++else
++ enable_poison_system_directories=no
++fi
++
++if test "x${enable_poison_system_directories}" = "xyes"; then
++
++$as_echo "#define ENABLE_POISON_SYSTEM_DIRECTORIES 1" >>confdefs.h
++
++fi
++
+ # Substitute configuration variables
+
+
+diff --git a/gcc/configure.ac b/gcc/configure.ac
+index 09082e8ccae..5504bf6eb01 100644
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -7292,6 +7292,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs,
+ [specify that runtime libraries should be
+ installed in a compiler-specific directory])])
+
++AC_ARG_ENABLE([poison-system-directories],
++ AS_HELP_STRING([--enable-poison-system-directories],
++ [warn for use of native system header directories]),,
++ [enable_poison_system_directories=no])
++if test "x${enable_poison_system_directories}" = "xyes"; then
++ AC_DEFINE([ENABLE_POISON_SYSTEM_DIRECTORIES],
++ [1],
++ [Define to warn for use of native system header directories])
++fi
++
+ # Substitute configuration variables
+ AC_SUBST(subdirs)
+ AC_SUBST(srcdir)
+diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
+index af0e5933fdb..b6731a4673c 100644
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}.
+ -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded
+ -Wparentheses -Wno-pedantic-ms-format
+ -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast
++-Wno-poison-system-directories
+ -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls
+ -Wrestrict -Wno-return-local-addr -Wreturn-type
+ -Wno-scalar-storage-order -Wsequence-point
+@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for
+ most targets, it is made up of code and thus requires the stack to be
+ made executable in order for the program to work properly.
+
++@opindex Wno-poison-system-directories
++@item -Wno-poison-system-directories
++Do not warn for @option{-I} or @option{-L} options using system
++directories such as @file{/usr/include} when cross compiling. This
++option is intended for use in chroot environments when such
++directories contain the correct headers and libraries for the target
++system rather than the host.
++
+ @opindex Wfloat-equal
+ @opindex Wno-float-equal
+ @item -Wfloat-equal
+diff --git a/gcc/gcc.cc b/gcc/gcc.cc
+index 16bb07f2cdc..33b56e721d2 100644
+--- a/gcc/gcc.cc
++++ b/gcc/gcc.cc
+@@ -1146,6 +1146,8 @@ proper position among the other output files. */
+ "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
+ "%X %{o*} %{e*} %{N} %{n} %{r}\
+ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
++ %{Wno-poison-system-directories:--no-poison-system-directories} \
++ %{Werror=poison-system-directories:--error-poison-system-directories} \
+ %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \
+ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \
+ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\
+diff --git a/gcc/incpath.cc b/gcc/incpath.cc
+index 4d44321183f..0f3f071b44c 100644
+--- a/gcc/incpath.cc
++++ b/gcc/incpath.cc
+@@ -26,6 +26,7 @@
+ #include "intl.h"
+ #include "incpath.h"
+ #include "cppdefault.h"
++#include "diagnostic-core.h"
+
+ /* Microsoft Windows does not natively support inodes.
+ VMS has non-numeric inodes. */
+@@ -399,6 +400,26 @@ merge_include_chains (const char *sysroot, cpp_reader *pfile, int verbose)
+ }
+ fprintf (stderr, _("End of search list.\n"));
+ }
++
++#ifdef ENABLE_POISON_SYSTEM_DIRECTORIES
++ if (flag_poison_system_directories)
++ {
++ struct cpp_dir *p;
++
++ for (p = heads[INC_QUOTE]; p; p = p->next)
++ {
++ if ((!strncmp (p->name, "/usr/include", 12))
++ || (!strncmp (p->name, "/usr/local/include", 18))
++ || (!strncmp (p->name, "/usr/X11R6/include", 18))
++ || (!strncmp (p->name, "/sw/include", 11))
++ || (!strncmp (p->name, "/opt/include", 12)))
++ warning (OPT_Wpoison_system_directories,
++ "include location \"%s\" is unsafe for "
++ "cross-compilation",
++ p->name);
++ }
++ }
++#endif
+ }
+
+ /* Use given -I paths for #include "..." but not #include <...>, and
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0003-specs-turn-on-Wl-z-now-by-default.patch b/musl/patches-in-mcm/gcc-13.2.0/0003-specs-turn-on-Wl-z-now-by-default.patch
new file mode 100644
index 0000000..bfb0a6e
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0003-specs-turn-on-Wl-z-now-by-default.patch
@@ -0,0 +1,44 @@
+From ff4dd4ce33133e675b7bedc86b73357c04631cb9 Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:45:49 +0000
+Subject: [PATCH 03/35] specs: turn on -Wl,-z,now by default
+
+Previously, we also used to turn on -z relro here, but we now build
+binutils with --enable-relro, which is functionally equivalent.
+
+Binutils does not appear to have a similar option for enabling -z
+now by default.
+---
+ gcc/doc/invoke.texi | 3 +++
+ gcc/gcc.cc | 1 +
+ 2 files changed, 4 insertions(+)
+
+diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
+index b6731a4673c..f393c7846c6 100644
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -17961,6 +17961,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the
+ linker. When using the GNU linker, you can also get the same effect with
+ @option{-Wl,-Map=output.map}.
+
++NOTE: In Alpine Linux, for LDFLAGS, the option
++@option{-Wl,-z,now} is used. To disable, use @option{-Wl,-z,nonow}.
++
+ @opindex u
+ @item -u @var{symbol}
+ Pretend the symbol @var{symbol} is undefined, to force linking of
+diff --git a/gcc/gcc.cc b/gcc/gcc.cc
+index 33b56e721d2..f82fae23c22 100644
+--- a/gcc/gcc.cc
++++ b/gcc/gcc.cc
+@@ -1144,6 +1144,7 @@ proper position among the other output files. */
+ "%{flto|flto=*:%<fcompare-debug*} \
+ %{flto} %{fno-lto} %{flto=*} %l " LINK_PIE_SPEC \
+ "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
++ "-z now " \
+ "%X %{o*} %{e*} %{N} %{n} %{r}\
+ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
+ %{Wno-poison-system-directories:--no-poison-system-directories} \
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0004-static-pie.diff b/musl/patches-in-mcm/gcc-13.2.0/0004-static-pie.diff
new file mode 100644
index 0000000..9073217
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0004-static-pie.diff
@@ -0,0 +1,89 @@
+diff -rNU3 gcc-13.2.0.old/gcc/common.opt gcc-13.2.0/gcc/common.opt
+--- gcc-13.2.0.old/gcc/common.opt 2023-07-27 08:13:04.000000000 +0000
++++ gcc-13.2.0/gcc/common.opt 2023-08-30 18:18:22.940099965 +0000
+@@ -3669,11 +3669,11 @@
+
+ no-pie
+ Driver RejectNegative Negative(shared)
+-Don't create a dynamically linked position independent executable.
++Don't create a position independent executable.
+
+ pie
+ Driver RejectNegative Negative(no-pie)
+-Create a dynamically linked position independent executable.
++Create a position independent executable.
+
+ static-pie
+ Driver RejectNegative Negative(pie)
+diff -rNU3 gcc-13.2.0.old/gcc/config/gnu-user.h gcc-13.2.0/gcc/config/gnu-user.h
+--- gcc-13.2.0.old/gcc/config/gnu-user.h 2023-07-27 08:13:04.000000000 +0000
++++ gcc-13.2.0/gcc/config/gnu-user.h 2023-08-30 18:15:07.990098698 +0000
+@@ -51,13 +51,12 @@
+ #define GNU_USER_TARGET_STARTFILE_SPEC \
+ "%{shared:; \
+ pg|p|profile:%{static-pie:grcrt1.o%s;:gcrt1.o%s}; \
+- static:crt1.o%s; \
+- static-pie:rcrt1.o%s; \
++ static|static-pie:%{" PIE_SPEC ":rcrt1.o%s;:crt1.o%s}; \
+ " PIE_SPEC ":Scrt1.o%s; \
+ :crt1.o%s} " \
+ GNU_USER_TARGET_CRTI " \
+- %{static:crtbeginT.o%s; \
+- shared|static-pie|" PIE_SPEC ":crtbeginS.o%s; \
++ %{shared|" PIE_SPEC ":crtbeginS.o%s; \
++ static:crtbeginT.o%s; \
+ :crtbegin.o%s} \
+ %{fvtable-verify=none:%s; \
+ fvtable-verify=preinit:vtv_start_preinit.o%s; \
+@@ -73,11 +72,11 @@
+ GNU userspace "finalizer" file, `crtn.o'. */
+
+ #define GNU_USER_TARGET_ENDFILE_SPEC \
+- "%{!static:%{fvtable-verify=none:%s; \
++ "%{static|static-pie:; \
++ fvtable-verify=none:%s; \
+ fvtable-verify=preinit:vtv_end_preinit.o%s; \
+- fvtable-verify=std:vtv_end.o%s}} \
+- %{static:crtend.o%s; \
+- shared|static-pie|" PIE_SPEC ":crtendS.o%s; \
++ fvtable-verify=std:vtv_end.o%s} \
++ %{shared|" PIE_SPEC ":crtendS.o%s; \
+ :crtend.o%s} " \
+ GNU_USER_TARGET_CRTN " " \
+ CRTOFFLOADEND
+@@ -106,7 +105,7 @@
+ #define LIB_SPEC GNU_USER_TARGET_LIB_SPEC
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static|static-pie:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static|" PIE_SPEC ":--eh-frame-hdr} "
+ #endif
+
+ #define GNU_USER_TARGET_LINK_GCC_C_SEQUENCE_SPEC \
+diff -rNU3 gcc-13.2.0.old/gcc/gcc.cc gcc-13.2.0/gcc/gcc.cc
+--- gcc-13.2.0.old/gcc/gcc.cc 2023-07-27 08:13:04.000000000 +0000
++++ gcc-13.2.0/gcc/gcc.cc 2023-08-30 18:15:11.750098722 +0000
+@@ -1003,7 +1003,7 @@
+ #define NO_FPIE_AND_FPIC_SPEC NO_FPIE_SPEC "|" NO_FPIC_SPEC
+ #define FPIE_OR_FPIC_SPEC NO_FPIE_AND_FPIC_SPEC ":;"
+ #else
+-#define PIE_SPEC "pie"
++#define PIE_SPEC "pie|static-pie"
+ #define FPIE1_SPEC "fpie"
+ #define NO_FPIE1_SPEC FPIE1_SPEC ":;"
+ #define FPIE2_SPEC "fPIE"
+@@ -1027,12 +1027,12 @@
+ #ifndef LINK_PIE_SPEC
+ #ifdef HAVE_LD_PIE
+ #ifndef LD_PIE_SPEC
+-#define LD_PIE_SPEC "-pie"
++#define LD_PIE_SPEC "-pie %{static|static-pie:--no-dynamic-linker -z text -Bsymbolic}"
+ #endif
+ #else
+ #define LD_PIE_SPEC ""
+ #endif
+-#define LINK_PIE_SPEC "%{static|shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
++#define LINK_PIE_SPEC "%{shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
+ #endif
+
+ #ifndef LINK_BUILDID_SPEC
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch b/musl/patches-in-mcm/gcc-13.2.0/0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch
new file mode 100644
index 0000000..d229bcf
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch
@@ -0,0 +1,272 @@
+From 67c0f5789630b27149f60ff831999ef7c1dba5d5 Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:46:56 +0000
+Subject: [PATCH 05/35] On linux targets pass --as-needed by default to the
+ linker, but always link the sanitizer libraries with --no-as-needed.
+
+---
+ gcc/config/aarch64/aarch64-linux.h | 1 +
+ gcc/config/alpha/linux-elf.h | 2 +-
+ gcc/config/arm/linux-elf.h | 1 +
+ gcc/config/gnu-user.h | 6 +++---
+ gcc/config/i386/gnu-user.h | 2 +-
+ gcc/config/i386/gnu-user64.h | 1 +
+ gcc/config/ia64/linux.h | 2 +-
+ gcc/config/mips/gnu-user.h | 1 +
+ gcc/config/riscv/linux.h | 1 +
+ gcc/config/rs6000/linux64.h | 4 ++--
+ gcc/config/rs6000/sysv4.h | 2 +-
+ gcc/config/s390/linux.h | 2 +-
+ gcc/config/sparc/linux.h | 2 +-
+ gcc/gcc.cc | 28 ++++++++++++++++++++--------
+ 14 files changed, 36 insertions(+), 19 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
+index 4277f03da2a..b131983a546 100644
+--- a/gcc/config/aarch64/aarch64-linux.h
++++ b/gcc/config/aarch64/aarch64-linux.h
+@@ -35,6 +35,7 @@
+ #define CPP_SPEC "%{pthread:-D_REENTRANT}"
+
+ #define LINUX_TARGET_LINK_SPEC "%{h*} \
++ --as-needed \
+ %{static:-Bstatic} \
+ %{shared:-shared} \
+ %{symbolic:-Bsymbolic} \
+diff --git a/gcc/config/alpha/linux-elf.h b/gcc/config/alpha/linux-elf.h
+index 03f783f2ad1..d946e700dda 100644
+--- a/gcc/config/alpha/linux-elf.h
++++ b/gcc/config/alpha/linux-elf.h
+@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. If not see
+
+ #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER
+
+-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \
++#define LINK_SPEC "-m elf64alpha --as-needed %{G*} %{relax:-relax} \
+ %{O*:-O3} %{!O*:-O1} \
+ %{shared:-shared} \
+ %{!shared: \
+diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h
+index 7b7b7cbbe14..49c050c6f2c 100644
+--- a/gcc/config/arm/linux-elf.h
++++ b/gcc/config/arm/linux-elf.h
+@@ -70,6 +70,7 @@
+ %{rdynamic:-export-dynamic} \
+ %{!shared:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
+ -X \
++ --as-needed \
+ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+ SUBTARGET_EXTRA_LINK_SPEC
+
+diff --git a/gcc/config/gnu-user.h b/gcc/config/gnu-user.h
+index eda8010b133..b26b17f2f2a 100644
+--- a/gcc/config/gnu-user.h
++++ b/gcc/config/gnu-user.h
+@@ -136,7 +136,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ #define LIBASAN_EARLY_SPEC "%{!shared:libasan_preinit%O%s} " \
+ "%{static-libasan:%{!shared:" \
+ LD_STATIC_OPTION " --whole-archive -lasan --no-whole-archive " \
+- LD_DYNAMIC_OPTION "}}%{!static-libasan:-lasan}"
++ LD_DYNAMIC_OPTION "}}%{!static-libasan:%{!fuse-ld=gold:--push-state} --no-as-needed -lasan %{fuse-ld=gold:--as-needed;:--pop-state}}"
+ #undef LIBHWASAN_EARLY_SPEC
+ #define LIBHWASAN_EARLY_SPEC "%{!shared:libhwasan_preinit%O%s} " \
+ "%{static-libhwasan:%{!shared:" \
+@@ -146,12 +146,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ #define LIBTSAN_EARLY_SPEC "%{!shared:libtsan_preinit%O%s} " \
+ "%{static-libtsan:%{!shared:" \
+ LD_STATIC_OPTION " --whole-archive -ltsan --no-whole-archive " \
+- LD_DYNAMIC_OPTION "}}%{!static-libtsan:-ltsan}"
++ LD_DYNAMIC_OPTION "}}%{!static-libtsan:%{!fuse-ld=gold:--push-state} --no-as-needed -ltsan %{fuse-ld=gold:--as-needed;:--pop-state}}"
+ #undef LIBLSAN_EARLY_SPEC
+ #define LIBLSAN_EARLY_SPEC "%{!shared:liblsan_preinit%O%s} " \
+ "%{static-liblsan:%{!shared:" \
+ LD_STATIC_OPTION " --whole-archive -llsan --no-whole-archive " \
+- LD_DYNAMIC_OPTION "}}%{!static-liblsan:-llsan}"
++ LD_DYNAMIC_OPTION "}}%{!static-liblsan:%{!fuse-ld=gold:--push-state} --no-as-needed -llsan %{fuse-ld=gold:--as-needed;:--pop-state}}"
+ #endif
+
+ #undef TARGET_F951_OPTIONS
+diff --git a/gcc/config/i386/gnu-user.h b/gcc/config/i386/gnu-user.h
+index a79b739089d..e0752673dff 100644
+--- a/gcc/config/i386/gnu-user.h
++++ b/gcc/config/i386/gnu-user.h
+@@ -68,7 +68,7 @@ along with GCC; see the file COPYING3. If not see
+ { "link_emulation", GNU_USER_LINK_EMULATION },\
+ { "dynamic_linker", GNU_USER_DYNAMIC_LINKER }
+
+-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) %{shared:-shared} \
++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --as-needed %{shared:-shared} \
+ %{!shared: \
+ %{!static: \
+ %{!static-pie: \
+diff --git a/gcc/config/i386/gnu-user64.h b/gcc/config/i386/gnu-user64.h
+index 3b63b99acf6..759bf0db86f 100644
+--- a/gcc/config/i386/gnu-user64.h
++++ b/gcc/config/i386/gnu-user64.h
+@@ -56,6 +56,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \
+ %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \
+ %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \
++ --as-needed \
+ %{shared:-shared} \
+ %{!shared: \
+ %{!static: \
+diff --git a/gcc/config/ia64/linux.h b/gcc/config/ia64/linux.h
+index 5dfd428aa17..02656dad7fc 100644
+--- a/gcc/config/ia64/linux.h
++++ b/gcc/config/ia64/linux.h
+@@ -58,7 +58,7 @@ do { \
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
+
+ #undef LINK_SPEC
+-#define LINK_SPEC "\
++#define LINK_SPEC " --as-needed \
+ %{shared:-shared} \
+ %{!shared: \
+ %{!static: \
+diff --git a/gcc/config/mips/gnu-user.h b/gcc/config/mips/gnu-user.h
+index a4e5380b589..3cc61bce69f 100644
+--- a/gcc/config/mips/gnu-user.h
++++ b/gcc/config/mips/gnu-user.h
+@@ -55,6 +55,7 @@ along with GCC; see the file COPYING3. If not see
+ #undef GNU_USER_TARGET_LINK_SPEC
+ #define GNU_USER_TARGET_LINK_SPEC "\
+ %{G*} %{EB} %{EL} %{mips*} %{shared} \
++ -as-needed \
+ %{!shared: \
+ %{!static: \
+ %{rdynamic:-export-dynamic} \
+diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
+index 3e625e0f867..f8c2c351e5a 100644
+--- a/gcc/config/riscv/linux.h
++++ b/gcc/config/riscv/linux.h
+@@ -48,6 +48,7 @@ along with GCC; see the file COPYING3. If not see
+ "%{mabi=ilp32:_ilp32}"
+
+ #define LINK_SPEC "\
++-as-needed \
+ -melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv" LD_EMUL_SUFFIX " \
+ %{mno-relax:--no-relax} \
+ %{mbig-endian:-EB} \
+diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h
+index 9e457033d11..08016bf224d 100644
+--- a/gcc/config/rs6000/linux64.h
++++ b/gcc/config/rs6000/linux64.h
+@@ -377,13 +377,13 @@ extern int dot_symbols;
+ " -m elf64ppc")
+ #endif
+
+-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --as-needed %{!shared: %{!static: \
+ %{!static-pie: \
+ %{rdynamic:-export-dynamic} \
+ -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}} \
+ %(link_os_extra_spec32)"
+
+-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --as-needed %{!shared: %{!static: \
+ %{!static-pie: \
+ %{rdynamic:-export-dynamic} \
+ -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}} \
+diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
+index ae932fc22f0..c8ff0c6dc8e 100644
+--- a/gcc/config/rs6000/sysv4.h
++++ b/gcc/config/rs6000/sysv4.h
+@@ -780,7 +780,7 @@ GNU_USER_TARGET_CC1_SPEC
+ #define GNU_USER_DYNAMIC_LINKER GLIBC_DYNAMIC_LINKER
+ #endif
+
+-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --as-needed %{!shared: %{!static: \
+ %{rdynamic:-export-dynamic} \
+ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
+
+diff --git a/gcc/config/s390/linux.h b/gcc/config/s390/linux.h
+index 02aa1edaff8..64df5801134 100644
+--- a/gcc/config/s390/linux.h
++++ b/gcc/config/s390/linux.h
+@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3. If not see
+
+ #undef LINK_SPEC
+ #define LINK_SPEC \
+- "%{m31:-m elf_s390}%{m64:-m elf64_s390} \
++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --as-needed \
+ %{shared:-shared} \
+ %{!shared: \
+ %{static:-static} \
+diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h
+index 0e33b3cac2c..c2f44546e62 100644
+--- a/gcc/config/sparc/linux.h
++++ b/gcc/config/sparc/linux.h
+@@ -81,7 +81,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+
+ #undef LINK_SPEC
+-#define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
++#define LINK_SPEC "-m elf32_sparc --as-needed %{shared:-shared} \
+ %{!mno-relax:%{!r:-relax}} \
+ %{!shared: \
+ %{!static: \
+diff --git a/gcc/gcc.cc b/gcc/gcc.cc
+index f82fae23c22..da6417dd0d1 100644
+--- a/gcc/gcc.cc
++++ b/gcc/gcc.cc
+@@ -754,8 +754,11 @@ proper position among the other output files. */
+ #ifdef LIBASAN_EARLY_SPEC
+ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS
+ #elif defined(HAVE_LD_STATIC_DYNAMIC)
+-#define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION \
+- "} -lasan %{static-libasan:" LD_DYNAMIC_OPTION "}" \
++#define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \
++ " %{!static-libasan:%{!fuse-ld=gold:--push-state }--no-as-needed}" \
++ " -lasan " \
++ " %{static-libasan:" LD_DYNAMIC_OPTION "}" \
++ " %{!static-libasan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \
+ STATIC_LIBASAN_LIBS
+ #else
+ #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS
+@@ -790,8 +793,11 @@ proper position among the other output files. */
+ #ifdef LIBTSAN_EARLY_SPEC
+ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS
+ #elif defined(HAVE_LD_STATIC_DYNAMIC)
+-#define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION \
+- "} -ltsan %{static-libtsan:" LD_DYNAMIC_OPTION "}" \
++#define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \
++ " %{!static-libtsan:%{!fuse-ld=gold:--push-state }--no-as-needed}" \
++ " -ltsan " \
++ " %{static-libtsan:" LD_DYNAMIC_OPTION "}" \
++ " %{!static-libtsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \
+ STATIC_LIBTSAN_LIBS
+ #else
+ #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS
+@@ -808,8 +814,11 @@ proper position among the other output files. */
+ #ifdef LIBLSAN_EARLY_SPEC
+ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS
+ #elif defined(HAVE_LD_STATIC_DYNAMIC)
+-#define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION \
+- "} -llsan %{static-liblsan:" LD_DYNAMIC_OPTION "}" \
++#define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \
++ " %{!static-liblsan:%{!fuse-ld=gold:--push-state }--no-as-needed}" \
++ " -llsan " \
++ " %{static-liblsan:" LD_DYNAMIC_OPTION "}" \
++ " %{!static-liblsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \
+ STATIC_LIBLSAN_LIBS
+ #else
+ #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS
+@@ -824,8 +833,11 @@ proper position among the other output files. */
+ #define STATIC_LIBUBSAN_LIBS \
+ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}"
+ #ifdef HAVE_LD_STATIC_DYNAMIC
+-#define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION \
+- "} -lubsan %{static-libubsan:" LD_DYNAMIC_OPTION "}" \
++#define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \
++ " %{!static-libubsan:%{!fuse-ld=gold:--push-state }--no-as-needed}" \
++ " -lubsan " \
++ " %{static-libubsan:" LD_DYNAMIC_OPTION "}" \
++ " %{!static-libubsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \
+ STATIC_LIBUBSAN_LIBS
+ #else
+ #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0005-m68k-sqrt.diff b/musl/patches-in-mcm/gcc-13.2.0/0005-m68k-sqrt.diff
new file mode 100644
index 0000000..652efb1
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0005-m68k-sqrt.diff
@@ -0,0 +1,20 @@
+diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
+index 59a456cd496..dbfddea41bd 100644
+--- a/gcc/config/m68k/m68k.md
++++ b/gcc/config/m68k/m68k.md
+@@ -4174,13 +4174,13 @@
+ (define_expand "sqrt<mode>2"
+ [(set (match_operand:FP 0 "nonimmediate_operand" "")
+ (sqrt:FP (match_operand:FP 1 "general_operand" "")))]
+- "TARGET_HARD_FLOAT"
++ "(TARGET_68881 && TARGET_68040) || TARGET_COLDFIRE_FPU"
+ "")
+
+ (define_insn "sqrt<mode>2_68881"
+ [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
+ (sqrt:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m")))]
+- "TARGET_68881"
++ "TARGET_68881 && TARGET_68040"
+ {
+ if (FP_REG_P (operands[1]))
+ return "f<FP:round>sqrt%.x %1,%0";
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0006-Enable-Wformat-and-Wformat-security-by-default.patch b/musl/patches-in-mcm/gcc-13.2.0/0006-Enable-Wformat-and-Wformat-security-by-default.patch
new file mode 100644
index 0000000..55dff36
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0006-Enable-Wformat-and-Wformat-security-by-default.patch
@@ -0,0 +1,34 @@
+From bb25e8489384504cd59e4a2538720863da1fb29c Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:47:43 +0000
+Subject: [PATCH 06/35] Enable -Wformat and -Wformat-security by default.
+
+---
+ gcc/c-family/c.opt | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt
+index a75038930ae..b98726f33ed 100644
+--- a/gcc/c-family/c.opt
++++ b/gcc/c-family/c.opt
+@@ -704,7 +704,7 @@ Warn about function calls with format strings that write past the end
+ of the destination region. Same as -Wformat-overflow=1.
+
+ Wformat-security
+-C ObjC C++ ObjC++ Var(warn_format_security) Warning LangEnabledBy(C ObjC C++ ObjC++,Wformat=, warn_format >= 2, 0)
++C ObjC C++ ObjC++ Var(warn_format_security) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wformat=, warn_format >= 2, 0)
+ Warn about possible security problems with format functions.
+
+ Wformat-signedness
+@@ -725,7 +725,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++
+ Warn about zero-length formats.
+
+ Wformat=
+-C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2)
++C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2)
+ Warn about printf/scanf/strftime/strfmon format string anomalies.
+
+ Wformat-overflow=
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0007-Enable-Wtrampolines-by-default.patch b/musl/patches-in-mcm/gcc-13.2.0/0007-Enable-Wtrampolines-by-default.patch
new file mode 100644
index 0000000..eb7aae8
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0007-Enable-Wtrampolines-by-default.patch
@@ -0,0 +1,25 @@
+From 4a728ad48a7b437cc6f2697e26603bf648149f86 Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:48:24 +0000
+Subject: [PATCH 07/35] Enable -Wtrampolines by default.
+
+---
+ gcc/common.opt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/gcc/common.opt b/gcc/common.opt
+index 64c4277c991..c24839d32bc 100644
+--- a/gcc/common.opt
++++ b/gcc/common.opt
+@@ -803,7 +803,7 @@ Common Var(warn_system_headers) Warning
+ Do not suppress warnings from system headers.
+
+ Wtrampolines
+-Common Var(warn_trampolines) Warning
++Common Var(warn_trampolines) Init(1) Warning
+ Warn whenever a trampoline is generated.
+
+ Wtrivial-auto-var-init
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch b/musl/patches-in-mcm/gcc-13.2.0/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch
new file mode 100644
index 0000000..69c1bf7
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch
@@ -0,0 +1,53 @@
+From 32f24560d0602f7735d5e9efd92fe3151bd72cea Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:49:40 +0000
+Subject: [PATCH 08/35] Disable ssp on -nostdlib, -nodefaultlibs and
+ -ffreestanding Change the buffer size.
+
+---
+ gcc/gcc.cc | 8 +++++++-
+ gcc/params.opt | 2 +-
+ 2 files changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/gcc.cc b/gcc/gcc.cc
+index da6417dd0d1..b5a6f200635 100644
+--- a/gcc/gcc.cc
++++ b/gcc/gcc.cc
+@@ -983,6 +983,12 @@ proper position among the other output files. */
+ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}"
+ #endif
+
++#ifdef ENABLE_DEFAULT_SSP
++#define NO_SSP_SPEC "%{nostdlib|nodefaultlibs|ffreestanding:-fno-stack-protector} "
++#else
++#define NO_SSP_SPEC ""
++#endif
++
+ #ifndef LINK_SSP_SPEC
+ #ifdef TARGET_LIBC_PROVIDES_SSP
+ #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
+@@ -1282,7 +1288,7 @@ static const char *cc1_options =
+ %{-version:--version}\
+ %{-help=*:--help=%*}\
+ %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %w%b.s}}}\
+- %{fsyntax-only:-o %j} %{-param*}\
++ %{fsyntax-only:-o %j} %{-param*} " NO_SSP_SPEC "\
+ %{coverage:-fprofile-arcs -ftest-coverage}\
+ %{fprofile-arcs|fprofile-generate*|coverage:\
+ %{!fprofile-update=single:\
+diff --git a/gcc/params.opt b/gcc/params.opt
+index 823cdb2ff85..5b096899b40 100644
+--- a/gcc/params.opt
++++ b/gcc/params.opt
+@@ -1006,7 +1006,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim
+ The maximum number of SSA_NAME assignments to follow in determining a value.
+
+ -param=ssp-buffer-size=
+-Common Joined UInteger Var(param_ssp_buffer_size) Init(8) IntegerRange(1, 65536) Param Optimization
++Common Joined UInteger Var(param_ssp_buffer_size) Init(4) IntegerRange(1, 65536) Param Optimization
+ The lower bound for a buffer to be considered for stack smashing protection.
+
+ -param=stack-clash-protection-guard-size=
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0009-Ensure-that-msgfmt-doesn-t-encounter-problems-during.patch b/musl/patches-in-mcm/gcc-13.2.0/0009-Ensure-that-msgfmt-doesn-t-encounter-problems-during.patch
new file mode 100644
index 0000000..f4dd52f
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0009-Ensure-that-msgfmt-doesn-t-encounter-problems-during.patch
@@ -0,0 +1,54 @@
+From c7ec8da7280d7f97f5543eb9ddeca7600aafc43c Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:50:33 +0000
+Subject: [PATCH 09/35] Ensure that msgfmt doesn't encounter problems during
+ gcc bootstrapping.
+
+Solves error messages like the following:
+
+msgfmt: /var/tmp/portage/sys-devel/gcc-4.1.2/work/build/./gcc/libgcc_s.so.1: version `GCC_4.2.0' not found (required by /usr/lib/gcc/x86_64-pc-linux-gnu/4.5.3/libstdc++.so.6)
+
+The libgcc_s.so used during build doesn't satisfy the needs of the
+libstdc++.so that msgfmt is linked against. On the other hand, msgfmt
+is used as a stand-alone application here, and what library it uses
+behind the scenes is of no concern to the gcc build process.
+Therefore, simply invoking it "as usual", i.e. without any special
+library path, will make it work as expected here.
+
+2011-09-19 Martin von Gagern
+
+References:
+https://bugs.gentoo.org/372377
+https://bugs.gentoo.org/295480
+---
+ libstdc++-v3/po/Makefile.am | 1 +
+ libstdc++-v3/po/Makefile.in | 1 +
+ 2 files changed, 2 insertions(+)
+
+diff --git a/libstdc++-v3/po/Makefile.am b/libstdc++-v3/po/Makefile.am
+index 12d34910830..61b13762b71 100644
+--- a/libstdc++-v3/po/Makefile.am
++++ b/libstdc++-v3/po/Makefile.am
+@@ -38,6 +38,7 @@ MSGFMT = msgfmt
+ EXTRA_DIST = string_literals.cc POTFILES.in $(PACKAGE).pot $(LOCALE_IN)
+
+ .po.mo:
++ env --unset=LD_LIBRARY_PATH \
+ $(MSGFMT) -o $@ $<
+
+ all-local: all-local-$(USE_NLS)
+diff --git a/libstdc++-v3/po/Makefile.in b/libstdc++-v3/po/Makefile.in
+index 8e93445acd2..d6ff06e5ddb 100644
+--- a/libstdc++-v3/po/Makefile.in
++++ b/libstdc++-v3/po/Makefile.in
+@@ -561,6 +561,7 @@ uninstall-am:
+
+
+ .po.mo:
++ env --unset=LD_LIBRARY_PATH \
+ $(MSGFMT) -o $@ $<
+
+ all-local: all-local-$(USE_NLS)
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch b/musl/patches-in-mcm/gcc-13.2.0/0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch
new file mode 100644
index 0000000..f56d41a
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch
@@ -0,0 +1,28 @@
+From aaa029bcee68298695b7c4278c90b6bc320d098c Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:52:07 +0000
+Subject: [PATCH 10/35] Don't declare asprintf if defined as a macro.
+
+---
+ include/libiberty.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/include/libiberty.h b/include/libiberty.h
+index 1d5c779fcff..19e3cb1e31c 100644
+--- a/include/libiberty.h
++++ b/include/libiberty.h
+@@ -652,8 +652,11 @@ extern void *bsearch_r (const void *, const void *,
+ /* Like sprintf but provides a pointer to malloc'd storage, which must
+ be freed by the caller. */
+
++/* asprintf may be declared as a macro by glibc with __USE_FORTIFY_LEVEL. */
++#ifndef asprintf
+ extern int asprintf (char **, const char *, ...) ATTRIBUTE_PRINTF_2;
+ #endif
++#endif
+
+ /* Like asprintf but allocates memory without fail. This works like
+ xmalloc. */
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0011-libiberty-copy-PIC-objects-during-build-process.patch b/musl/patches-in-mcm/gcc-13.2.0/0011-libiberty-copy-PIC-objects-during-build-process.patch
new file mode 100644
index 0000000..b12d4f9
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0011-libiberty-copy-PIC-objects-during-build-process.patch
@@ -0,0 +1,24 @@
+From 65e01e749205c9af218b01233cebd0077538d0ee Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:53:00 +0000
+Subject: [PATCH 11/35] libiberty: copy PIC objects during build process
+
+---
+ libiberty/Makefile.in | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/libiberty/Makefile.in b/libiberty/Makefile.in
+index 72608f3e4a7..58356884728 100644
+--- a/libiberty/Makefile.in
++++ b/libiberty/Makefile.in
+@@ -265,6 +265,7 @@ $(TARGETLIB): $(REQUIRED_OFILES) $(EXTRA_OFILES) $(LIBOBJS)
+ $(AR) $(AR_FLAGS) $(TARGETLIB) \
+ $(REQUIRED_OFILES) $(EXTRA_OFILES) $(LIBOBJS); \
+ $(RANLIB) $(TARGETLIB); \
++ cp $(TARGETLIB) ../ ; \
+ cd ..; \
+ else true; fi
+
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0012-libgcc_s.patch b/musl/patches-in-mcm/gcc-13.2.0/0012-libgcc_s.patch
new file mode 100644
index 0000000..d8bbc60
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0012-libgcc_s.patch
@@ -0,0 +1,57 @@
+From 453a815bf2844971a91eaef800af188d9e86b784 Mon Sep 17 00:00:00 2001
+From: Szabolcs Nagy <nsz@port70.net>
+Date: Sat, 24 Oct 2015 20:09:53 +0000
+Subject: [PATCH 12/35] libgcc_s
+
+---
+ gcc/config/i386/i386-expand.cc | 4 ++--
+ libgcc/config/i386/cpuinfo.c | 6 +++---
+ libgcc/config/i386/t-linux | 2 +-
+ 3 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
+index 0d817fc3f3b..2e99db00db9 100644
+--- a/gcc/config/i386/i386-expand.cc
++++ b/gcc/config/i386/i386-expand.cc
+@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
+ {
+ case IX86_BUILTIN_CPU_INIT:
+ {
+- /* Make it call __cpu_indicator_init in libgcc. */
++ /* Make it call __cpu_indicator_init in libgcc.a. */
+ tree call_expr, fndecl, type;
+ type = build_function_type_list (integer_type_node, NULL_TREE);
+- fndecl = build_fn_decl ("__cpu_indicator_init", type);
++ fndecl = build_fn_decl ("__cpu_indicator_init_local", type);
+ call_expr = build_call_expr (fndecl, 0);
+ return expand_expr (call_expr, target, mode, EXPAND_NORMAL);
+ }
+diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
+index 50b6d8248a2..724ced402a1 100644
+--- a/libgcc/config/i386/cpuinfo.c
++++ b/libgcc/config/i386/cpuinfo.c
+@@ -63,7 +63,7 @@ __cpu_indicator_init (void)
+ __cpu_features2);
+ }
+
+-#if defined SHARED && defined USE_ELF_SYMVER
+-__asm__ (".symver __cpu_indicator_init, __cpu_indicator_init@GCC_4.8.0");
+-__asm__ (".symver __cpu_model, __cpu_model@GCC_4.8.0");
++#ifndef SHARED
++int __cpu_indicator_init_local (void)
++ __attribute__ ((weak, alias ("__cpu_indicator_init")));
+ #endif
+diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux
+index 8506a635790..564296f788e 100644
+--- a/libgcc/config/i386/t-linux
++++ b/libgcc/config/i386/t-linux
+@@ -3,5 +3,5 @@
+ # t-slibgcc-elf-ver and t-linux
+ SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/i386/libgcc-glibc.ver
+
+-HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS)
++HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS)
+ CRTSTUFF_T_CFLAGS += $(CET_FLAGS)
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0013-nopie.patch b/musl/patches-in-mcm/gcc-13.2.0/0013-nopie.patch
new file mode 100644
index 0000000..28a765e
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0013-nopie.patch
@@ -0,0 +1,75 @@
+From 7d7d12137c666761a8dd61179c9651b85dae9b41 Mon Sep 17 00:00:00 2001
+From: Szabolcs Nagy <nsz@port70.net>
+Date: Sat, 7 Nov 2015 02:08:05 +0000
+Subject: [PATCH 13/35] nopie
+
+---
+ gcc/configure | 27 +++++++++++++++++++++++++++
+ gcc/configure.ac | 13 +++++++++++++
+ 2 files changed, 40 insertions(+)
+
+diff --git a/gcc/configure b/gcc/configure
+index 8c46369f73f..e59cbee1767 100755
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -32268,6 +32268,33 @@ fi
+ $as_echo "$gcc_cv_no_pie" >&6; }
+ if test "$gcc_cv_no_pie" = "yes"; then
+ NO_PIE_FLAG="-no-pie"
++else
++ # Check if -nopie works.
++ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
++$as_echo_n "checking for -nopie option... " >&6; }
++if test "${gcc_cv_nopie+set}" = set; then :
++ $as_echo_n "(cached) " >&6
++else
++ saved_LDFLAGS="$LDFLAGS"
++ LDFLAGS="$LDFLAGS -nopie"
++ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h. */
++int main(void) {return 0;}
++_ACEOF
++if ac_fn_cxx_try_link "$LINENO"; then :
++ gcc_cv_nopie=yes
++else
++ gcc_cv_nopie=no
++fi
++rm -f core conftest.err conftest.$ac_objext \
++ conftest$ac_exeext conftest.$ac_ext
++ LDFLAGS="$saved_LDFLAGS"
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_nopie" >&5
++$as_echo "$gcc_cv_nopie" >&6; }
++ if test "$gcc_cv_nopie" = "yes"; then
++ NO_PIE_FLAG="-nopie"
++ fi
+ fi
+
+
+diff --git a/gcc/configure.ac b/gcc/configure.ac
+index 5504bf6eb01..57268319de1 100644
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -7552,6 +7552,19 @@ AC_CACHE_CHECK([for -no-pie option],
+ LDFLAGS="$saved_LDFLAGS"])
+ if test "$gcc_cv_no_pie" = "yes"; then
+ NO_PIE_FLAG="-no-pie"
++else
++ # Check if -nopie works.
++ AC_CACHE_CHECK([for -nopie option],
++ [gcc_cv_nopie],
++ [saved_LDFLAGS="$LDFLAGS"
++ LDFLAGS="$LDFLAGS -nopie"
++ AC_LINK_IFELSE([int main(void) {return 0;}],
++ [gcc_cv_nopie=yes],
++ [gcc_cv_nopie=no])
++ LDFLAGS="$saved_LDFLAGS"])
++ if test "$gcc_cv_nopie" = "yes"; then
++ NO_PIE_FLAG="-nopie"
++ fi
+ fi
+ AC_SUBST([NO_PIE_FLAG])
+
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch b/musl/patches-in-mcm/gcc-13.2.0/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch
new file mode 100644
index 0000000..937cad8
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch
@@ -0,0 +1,24 @@
+From 6bb5b7d9161d05f31b001d8211a9c63caf63fd2f Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 06:59:43 +0000
+Subject: [PATCH 15/35] build: fix CXXFLAGS_FOR_BUILD passing
+
+---
+ Makefile.in | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Makefile.in b/Makefile.in
+index 06a9398e172..6ff2b3f9925 100644
+--- a/Makefile.in
++++ b/Makefile.in
+@@ -178,6 +178,7 @@ BUILD_EXPORTS = \
+ # built for the build system to override those in BASE_FLAGS_TO_PASS.
+ EXTRA_BUILD_FLAGS = \
+ CFLAGS="$(CFLAGS_FOR_BUILD)" \
++ CXXFLAGS="$(CXXFLAGS_FOR_BUILD)" \
+ LDFLAGS="$(LDFLAGS_FOR_BUILD)"
+
+ # This is the list of directories to built for the host system.
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0019-aarch64-disable-multilib-support.patch b/musl/patches-in-mcm/gcc-13.2.0/0019-aarch64-disable-multilib-support.patch
new file mode 100644
index 0000000..5a8148f
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0019-aarch64-disable-multilib-support.patch
@@ -0,0 +1,26 @@
+From 41d00a2eb0754acf71958808bd17dbebeb517b84 Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Thu, 6 Jan 2022 03:12:55 +0000
+Subject: [PATCH 19/35] aarch64: disable multilib support
+
+multilib is unsupported on Alpine GCC
+---
+ gcc/config/aarch64/t-aarch64-linux | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/gcc/config/aarch64/t-aarch64-linux b/gcc/config/aarch64/t-aarch64-linux
+index 57bf4100fcd..172894b57ef 100644
+--- a/gcc/config/aarch64/t-aarch64-linux
++++ b/gcc/config/aarch64/t-aarch64-linux
+@@ -22,7 +22,7 @@ LIB1ASMSRC = aarch64/lib1funcs.asm
+ LIB1ASMFUNCS = _aarch64_sync_cache_range
+
+ AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),_be)
+-MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
++MULTILIB_OSDIRNAMES = mabi.lp64=../lib
+ MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu)
+
+ MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32)
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0020-s390x-disable-multilib-support.patch b/musl/patches-in-mcm/gcc-13.2.0/0020-s390x-disable-multilib-support.patch
new file mode 100644
index 0000000..ef2f449
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0020-s390x-disable-multilib-support.patch
@@ -0,0 +1,25 @@
+From 85b42bfbba71616831d14360b16998acb28790fd Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Thu, 6 Jan 2022 03:13:59 +0000
+Subject: [PATCH 20/35] s390x: disable multilib support
+
+multilib is not supported on Alpine GCC at present
+---
+ gcc/config/s390/t-linux64 | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/config/s390/t-linux64 b/gcc/config/s390/t-linux64
+index cc6ab367072..7f498ee1cdc 100644
+--- a/gcc/config/s390/t-linux64
++++ b/gcc/config/s390/t-linux64
+@@ -7,5 +7,5 @@
+
+ MULTILIB_OPTIONS = m64/m31
+ MULTILIB_DIRNAMES = 64 32
+-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu)
+-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu)
++MULTILIB_OSDIRNAMES = m64=../lib
++MULTILIB_OSDIRNAMES+= m32=../lib32
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0021-ppc64-le-disable-multilib-support.patch b/musl/patches-in-mcm/gcc-13.2.0/0021-ppc64-le-disable-multilib-support.patch
new file mode 100644
index 0000000..dbdc788
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0021-ppc64-le-disable-multilib-support.patch
@@ -0,0 +1,81 @@
+From 7b53df284242638e940c0155b6c21e88cea1f55b Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Thu, 6 Jan 2022 03:14:33 +0000
+Subject: [PATCH 21/35] ppc64[le]: disable multilib support
+
+multilib is not presently supported on Alpine GCC
+---
+ gcc/config/rs6000/t-linux | 6 ++++--
+ gcc/config/rs6000/t-linux64 | 4 ++--
+ gcc/config/rs6000/t-linux64bele | 4 ++--
+ gcc/config/rs6000/t-linux64lebe | 4 ++--
+ 4 files changed, 10 insertions(+), 8 deletions(-)
+
+diff --git a/gcc/config/rs6000/t-linux b/gcc/config/rs6000/t-linux
+index 4e371255533..128c75c7d39 100644
+--- a/gcc/config/rs6000/t-linux
++++ b/gcc/config/rs6000/t-linux
+@@ -2,7 +2,8 @@
+ # or soft-float.
+ ifeq (,$(filter $(with_cpu),$(SOFT_FLOAT_CPUS))$(findstring soft,$(with_float)))
+ ifneq (,$(findstring powerpc64,$(target)))
+-MULTILIB_OSDIRNAMES := .=../lib64$(call if_multiarch,:powerpc64-linux-gnu)
++MULTILIB_OSDIRNAMES := m64=../lib
++MULTILIB_OSDIRNAMES += m32=../lib32
+ else
+ MULTIARCH_DIRNAME := $(call if_multiarch,powerpc-linux-gnu)
+ endif
+@@ -10,7 +11,8 @@ ifneq (,$(findstring powerpcle,$(target)))
+ MULTIARCH_DIRNAME := $(subst -linux,le-linux,$(MULTIARCH_DIRNAME))
+ endif
+ ifneq (,$(findstring powerpc64le,$(target)))
+-MULTILIB_OSDIRNAMES := $(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))
++MULTILIB_OSDIRNAMES := m64=../lib
++MULTILIB_OSDIRNAMES += m32=../lib32
+ endif
+ endif
+
+diff --git a/gcc/config/rs6000/t-linux64 b/gcc/config/rs6000/t-linux64
+index 01a94242308..b3a76379c03 100644
+--- a/gcc/config/rs6000/t-linux64
++++ b/gcc/config/rs6000/t-linux64
+@@ -28,8 +28,8 @@
+ MULTILIB_OPTIONS := m64/m32
+ MULTILIB_DIRNAMES := 64 32
+ MULTILIB_EXTRA_OPTS :=
+-MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu)
+-MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu)
++MULTILIB_OSDIRNAMES := m64=../lib
++MULTILIB_OSDIRNAMES += m32=../lib32
+
+ rs6000-linux.o: $(srcdir)/config/rs6000/rs6000-linux.cc
+ $(COMPILE) $<
+diff --git a/gcc/config/rs6000/t-linux64bele b/gcc/config/rs6000/t-linux64bele
+index 97c1ee6fb4d..08d72639cb6 100644
+--- a/gcc/config/rs6000/t-linux64bele
++++ b/gcc/config/rs6000/t-linux64bele
+@@ -2,6 +2,6 @@
+
+ MULTILIB_OPTIONS += mlittle
+ MULTILIB_DIRNAMES += le
+-MULTILIB_OSDIRNAMES += $(subst =,.mlittle=,$(subst lible32,lib32le,$(subst lible64,lib64le,$(subst lib,lible,$(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))))))
+-MULTILIB_OSDIRNAMES += $(subst $(if $(findstring 64,$(target)),m64,m32).,,$(filter $(if $(findstring 64,$(target)),m64,m32).mlittle%,$(MULTILIB_OSDIRNAMES)))
++MULTILIB_OSDIRNAMES = m64=../lib
++MULTILIB_OSDIRNAMES+= m32=../lib32
+ MULTILIB_MATCHES := ${MULTILIB_MATCHES_ENDIAN}
+diff --git a/gcc/config/rs6000/t-linux64lebe b/gcc/config/rs6000/t-linux64lebe
+index 2e63bdb9fc9..c6e1c5db65d 100644
+--- a/gcc/config/rs6000/t-linux64lebe
++++ b/gcc/config/rs6000/t-linux64lebe
+@@ -2,6 +2,6 @@
+
+ MULTILIB_OPTIONS += mbig
+ MULTILIB_DIRNAMES += be
+-MULTILIB_OSDIRNAMES += $(subst =,.mbig=,$(subst libbe32,lib32be,$(subst libbe64,lib64be,$(subst lib,libbe,$(subst le-linux,-linux,$(MULTILIB_OSDIRNAMES))))))
+-MULTILIB_OSDIRNAMES += $(subst $(if $(findstring 64,$(target)),m64,m32).,,$(filter $(if $(findstring 64,$(target)),m64,m32).mbig%,$(MULTILIB_OSDIRNAMES)))
++MULTILIB_OSDIRNAMES := m64=../lib
++MULTILIB_OSDIRNAMES += m32=../lib32
+ MULTILIB_MATCHES := ${MULTILIB_MATCHES_ENDIAN}
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0022-x86_64-disable-multilib-support.patch b/musl/patches-in-mcm/gcc-13.2.0/0022-x86_64-disable-multilib-support.patch
new file mode 100644
index 0000000..2b2f3e7
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0022-x86_64-disable-multilib-support.patch
@@ -0,0 +1,26 @@
+From 96e7e1e9a899d9bb5fcbdf788bd529d0390c626f Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Thu, 6 Jan 2022 03:14:54 +0000
+Subject: [PATCH 22/35] x86_64: disable multilib support
+
+multilib is not presently supported on Alpine GCC
+---
+ gcc/config/i386/t-linux64 | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/config/i386/t-linux64 b/gcc/config/i386/t-linux64
+index 138956b0962..bc03dab874f 100644
+--- a/gcc/config/i386/t-linux64
++++ b/gcc/config/i386/t-linux64
+@@ -33,6 +33,6 @@
+ comma=,
+ MULTILIB_OPTIONS = $(subst $(comma),/,$(TM_MULTILIB_CONFIG))
+ MULTILIB_DIRNAMES = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS)))
+-MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu)
+-MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu)
++MULTILIB_OSDIRNAMES = m64=../lib
++MULTILIB_OSDIRNAMES+= m32=../lib32
+ MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32)
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0023-riscv-disable-multilib-support.patch b/musl/patches-in-mcm/gcc-13.2.0/0023-riscv-disable-multilib-support.patch
new file mode 100644
index 0000000..b919def
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0023-riscv-disable-multilib-support.patch
@@ -0,0 +1,76 @@
+From b26224acf342eacb33491f6ea0da1faf73d35715 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=B6ren=20Tempel?= <soeren+git@soeren-tempel.net>
+Date: Mon, 3 Jan 2022 07:14:48 +0100
+Subject: [PATCH 23/35] riscv: disable multilib support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From the musl wiki [1]:
+
+ musl does not support sharing an include directory between archs
+ […], and thus is not compatible with GCC-style multilib. It is
+ recommended that distributions build GCC with multilib disabled,
+ and use library directories named lib, not lib64 or lib32.
+
+For this reason, we patch existing GCC configuration files (gcc/config)
+to pin MULTILIB_OSDIRNAMES to lib, there is also a corresponding GCC
+upstream bug about this issue [2]. Avoiding the use of lib64 and lib32
+directories is a bit more difficult on the RISC-V architecture. This is
+due to the fact that the default RISC-V configuration does not only use
+the lib64 and lib32 directories but also subdirectories within these
+directories for different RISC-V ABIs (e.g. lp64d, lp64, …) [3].
+
+This patch aligns the RISC-V configuration with other architectures by
+pinning MULTILIB_OSDIRNAMES to lib for rv64gc (our default RISC-V
+-march). Furthermore, this patch removes the ABI-specific startfile
+prefix spec. Since both of these impact the default LIBRARY_PATH [4]
+this patch thereby aligns the default RISC-V LIBRARY_PATH with that from
+other Alpine architectures and thereby fixes #13369 [5].
+
+Incidentally, this also fixes gccgo on riscv64, as without this patch
+gccgo is otherwise not able to find the *.gox files for the Go standard
+library.
+
+[1]: https://wiki.musl-libc.org/guidelines-for-distributions.html#Multilib/multi_arch
+[2]: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90077
+[3]: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103889#c14
+[4]: https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/gcc.c;h=d4c8746b0aa322286decf92aa72a12f0a393b655;hb=HEAD#l9122
+[5]: https://gitlab.alpinelinux.org/alpine/aports/-/issues/13369
+---
+ gcc/config/riscv/linux.h | 8 --------
+ gcc/config/riscv/t-linux | 7 +++++--
+ 2 files changed, 5 insertions(+), 10 deletions(-)
+
+diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
+index f8c2c351e5a..8d9881eadeb 100644
+--- a/gcc/config/riscv/linux.h
++++ b/gcc/config/riscv/linux.h
+@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3. If not see
+ %{static:-static}}"
+
+ #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
+-
+-#define STARTFILE_PREFIX_SPEC \
+- "/lib" XLEN_SPEC "/" ABI_SPEC "/ " \
+- "/usr/lib" XLEN_SPEC "/" ABI_SPEC "/ " \
+- "/lib/ " \
+- "/usr/lib/ "
+-
+-#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi
+diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux
+index 216d2776a18..1a8a863853e 100644
+--- a/gcc/config/riscv/t-linux
++++ b/gcc/config/riscv/t-linux
+@@ -1,3 +1,6 @@
+-# Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/
+-MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES)))
++MULTILIB_OPTIONS := march=rv64gc
++MULTILIB_DIRNAMES := rv64gc
++
++MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib,$(MULTILIB_DIRNAMES)))
+ MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES))
++MULTILIB_MATCHES := march?rv64gc=march?rv64imafdc
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0024-always-build-libgcc_eh.a.patch b/musl/patches-in-mcm/gcc-13.2.0/0024-always-build-libgcc_eh.a.patch
new file mode 100644
index 0000000..6b0514e
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0024-always-build-libgcc_eh.a.patch
@@ -0,0 +1,51 @@
+From a72e0613f79f6b6867819317accb7a714031a08c Mon Sep 17 00:00:00 2001
+From: Ariadne Conill <ariadne@dereferenced.org>
+Date: Fri, 21 Aug 2020 07:05:41 +0000
+Subject: [PATCH 24/35] always build libgcc_eh.a
+
+highly inspired by:
+ http://landley.net/hg/aboriginal/file/7e0747a665ab/sources/patches/gcc-core-libgcceh.patch
+---
+ libgcc/Makefile.in | 11 ++++++-----
+ 1 file changed, 6 insertions(+), 5 deletions(-)
+
+diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in
+index 6c4dc79ab71..023cede18a7 100644
+--- a/libgcc/Makefile.in
++++ b/libgcc/Makefile.in
+@@ -960,8 +960,9 @@ ifneq ($(LIBUNWIND),)
+ all: libunwind.a
+ endif
+
++all: libgcc_eh.a
+ ifeq ($(enable_shared),yes)
+-all: libgcc_eh.a libgcc_s$(SHLIB_EXT)
++all: libgcc_s$(SHLIB_EXT)
+ ifneq ($(LIBUNWIND),)
+ all: libunwind$(SHLIB_EXT)
+ libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT)
+@@ -1163,10 +1164,6 @@ install-libunwind:
+ install-shared:
+ $(mkinstalldirs) $(DESTDIR)$(inst_libdir)
+
+- $(INSTALL_DATA) libgcc_eh.a $(DESTDIR)$(inst_libdir)/
+- chmod 644 $(DESTDIR)$(inst_libdir)/libgcc_eh.a
+- $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc_eh.a
+-
+ $(subst @multilib_dir@,$(MULTIDIR),$(subst \
+ @shlib_base_name@,libgcc_s,$(subst \
+ @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL))))
+@@ -1183,6 +1180,10 @@ ifeq ($(enable_gcov),yes)
+ $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a
+ endif
+
++ $(INSTALL_DATA) libgcc_eh.a $(DESTDIR)$(inst_libdir)/
++ chmod 644 $(DESTDIR)$(inst_libdir)/libgcc_eh.a
++ $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc_eh.a
++
+ parts="$(INSTALL_PARTS)"; \
+ for file in $$parts; do \
+ rm -f $(DESTDIR)$(inst_libdir)/$$file; \
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch b/musl/patches-in-mcm/gcc-13.2.0/0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
new file mode 100644
index 0000000..fcf74ee
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
@@ -0,0 +1,256 @@
+From 7b50823d8a4131e5a55d2499a0f5a52b3d91eed2 Mon Sep 17 00:00:00 2001
+From: Drew DeVault <sir@cmpwn.com>
+Date: Wed, 9 Dec 2020 07:42:06 +0000
+Subject: [PATCH 27/35] configure: Add --enable-autolink-libatomic, use in
+ LINK_GCC_C_SEQUENCE_SPEC [PR81358]
+
+This fixes issues with RISC-V.
+---
+ Makefile.in | 1 +
+ gcc/config.in | 6 ++++++
+ gcc/config/gnu-user.h | 12 +++++++++++-
+ gcc/configure | 31 ++++++++++++++++++++++++++++++-
+ gcc/configure.ac | 21 +++++++++++++++++++++
+ gcc/doc/install.texi | 8 ++++++++
+ gcc/doc/tm.texi | 8 +++++++-
+ gcc/doc/tm.texi.in | 8 +++++++-
+ gcc/gcc.cc | 12 +++++++++++-
+ 9 files changed, 102 insertions(+), 5 deletions(-)
+
+diff --git a/Makefile.in b/Makefile.in
+index 6ff2b3f9925..394b105b271 100644
+--- a/Makefile.in
++++ b/Makefile.in
+@@ -235,6 +235,7 @@ HOST_EXPORTS = \
+ RANLIB_FOR_TARGET="$(RANLIB_FOR_TARGET)"; export RANLIB_FOR_TARGET; \
+ READELF_FOR_TARGET="$(READELF_FOR_TARGET)"; export READELF_FOR_TARGET; \
+ TOPLEVEL_CONFIGURE_ARGUMENTS="$(TOPLEVEL_CONFIGURE_ARGUMENTS)"; export TOPLEVEL_CONFIGURE_ARGUMENTS; \
++ TARGET_CONFIGDIRS="$(TARGET_CONFIGDIRS)"; export TARGET_CONFIGDIRS; \
+ HOST_LIBS="$(STAGE1_LIBS)"; export HOST_LIBS; \
+ GMPLIBS="$(HOST_GMPLIBS)"; export GMPLIBS; \
+ GMPINC="$(HOST_GMPINC)"; export GMPINC; \
+diff --git a/gcc/config.in b/gcc/config.in
+index 0679fbbf4c6..ee81139b385 100644
+--- a/gcc/config.in
++++ b/gcc/config.in
+@@ -118,6 +118,12 @@
+ #endif
+
+
++/* Define if libatomic should always be linked. */
++#ifndef USED_FOR_TARGET
++#undef ENABLE_AUTOLINK_LIBATOMIC
++#endif
++
++
+ /* Define to 1 to specify that we are using the BID decimal floating point
+ format instead of DPD */
+ #ifndef USED_FOR_TARGET
+diff --git a/gcc/config/gnu-user.h b/gcc/config/gnu-user.h
+index b26b17f2f2a..3f64ea46180 100644
+--- a/gcc/config/gnu-user.h
++++ b/gcc/config/gnu-user.h
+@@ -109,8 +109,18 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ #define LINK_EH_SPEC "%{!static|static-pie:--eh-frame-hdr} "
+ #endif
+
++#if !defined(LINK_LIBATOMIC_SPEC) && defined(ENABLE_AUTOLINK_LIBATOMIC)
++# ifdef LD_AS_NEEDED_OPTION
++# define LINK_LIBATOMIC_SPEC LD_AS_NEEDED_OPTION " -latomic " LD_NO_AS_NEEDED_OPTION
++# else
++# define LINK_LIBATOMIC_SPEC "-latomic"
++# endif
++#elif !defined(LINK_LIBATOMIC_SPEC)
++# define LINK_LIBATOMIC_SPEC ""
++#endif
++
+ #define GNU_USER_TARGET_LINK_GCC_C_SEQUENCE_SPEC \
+- "%{static|static-pie:--start-group} %G %{!nolibc:%L} \
++ "%{static|static-pie:--start-group} %G %{!nolibc:" LINK_LIBATOMIC_SPEC " %L} \
+ %{static|static-pie:--end-group}%{!static:%{!static-pie:%G}}"
+
+ #undef LINK_GCC_C_SEQUENCE_SPEC
+diff --git a/gcc/configure b/gcc/configure
+index e59cbee1767..787c35d4e25 100755
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -984,6 +984,7 @@ with_changes_root_url
+ enable_languages
+ with_multilib_list
+ with_multilib_generator
++enable_autolink_libatomic
+ with_zstd
+ with_zstd_include
+ with_zstd_lib
+@@ -1713,6 +1714,9 @@ Optional Features:
+ --disable-shared don't provide a shared libgcc
+ --disable-gcov don't provide libgcov and related host tools
+ --enable-languages=LIST specify which front-ends to build
++ --enable-autolink-libatomic
++ enable automatic linking of libatomic (ignored if
++ not built)
+ --disable-rpath do not hardcode runtime library paths
+ --enable-sjlj-exceptions
+ arrange to use setjmp/longjmp exception handling
+@@ -8329,7 +8333,6 @@ else
+ fi
+
+
+-
+ # Check whether --with-multilib-generator was given.
+ if test "${with_multilib_generator+set}" = set; then :
+ withval=$with_multilib_generator; :
+@@ -8337,6 +8340,32 @@ else
+ with_multilib_generator=default
+ fi
+
++# If libatomic is available, whether it should be linked automatically
++# Check whether --enable-autolink-libatomic was given.
++if test "${enable_autolink_libatomic+set}" = set; then :
++ enableval=$enable_autolink_libatomic;
++ case $enable_autolink_libatomic in
++ yes | no) ;;
++ *) as_fn_error $? "'$enable_autolink_libatomic' is an invalid value for
++--enable-autolink-libatomic. Valid choices are 'yes' and 'no'." "$LINENO" 5 ;;
++ esac
++
++else
++ enable_autolink_libatomic=''
++fi
++
++
++if test x$enable_autolink_libatomic = xyes; then
++ if echo " ${TARGET_CONFIGDIRS} " | grep " libatomic " > /dev/null 2>&1 ; then
++
++$as_echo "#define ENABLE_AUTOLINK_LIBATOMIC 1" >>confdefs.h
++
++ else
++ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: libatomic is not build for this target, --enable-autolink-libatomic ignored" >&5
++$as_echo "$as_me: WARNING: libatomic is not build for this target, --enable-autolink-libatomic ignored" >&2;}
++ fi
++fi
++
+
+ # -------------------------
+ # Checks for other programs
+diff --git a/gcc/configure.ac b/gcc/configure.ac
+index 57268319de1..56bcaa87620 100644
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -1199,6 +1199,27 @@ AC_ARG_WITH(multilib-generator,
+ :,
+ with_multilib_generator=default)
+
++# If libatomic is available, whether it should be linked automatically
++AC_ARG_ENABLE(autolink-libatomic,
++[AS_HELP_STRING([--enable-autolink-libatomic],
++ [enable automatic linking of libatomic (ignored if not built)])],
++[
++ case $enable_autolink_libatomic in
++ yes | no) ;;
++ *) AC_MSG_ERROR(['$enable_autolink_libatomic' is an invalid value for
++--enable-autolink-libatomic. Valid choices are 'yes' and 'no'.]) ;;
++ esac
++], [enable_autolink_libatomic=''])
++
++if test x$enable_autolink_libatomic = xyes; then
++ if echo " ${TARGET_CONFIGDIRS} " | grep " libatomic " > /dev/null 2>&1 ; then
++ AC_DEFINE(ENABLE_AUTOLINK_LIBATOMIC, 1,
++ [Define if libatomic should always be linked.])
++ else
++ AC_MSG_WARN([libatomic is not build for this target, --enable-autolink-libatomic ignored])
++ fi
++fi
++
+ # -------------------------
+ # Checks for other programs
+ # -------------------------
+diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
+index b30d3691fe6..ccc8e5dbb00 100644
+--- a/gcc/doc/install.texi
++++ b/gcc/doc/install.texi
+@@ -2377,6 +2377,14 @@ files, but these changed header paths may conflict with some compilation
+ environments. Enabled by default, and may be disabled using
+ @option{--disable-canonical-system-headers}.
+
++@item --enable-autolink-libatomic
++@itemx --disable-autolink-libatomic
++Tell GCC that it should automatically link libatomic; if supported by
++the linker, the file is only linked as needed. This flag is ignored
++when libatomic is not built. Note that this conigure flag is in particular
++useful when building an offloading-target compiler; as for those, a
++user had to specify @code{-foffload=target=-latomic} otherwise.
++
+ @item --with-glibc-version=@var{major}.@var{minor}
+ Tell GCC that when the GNU C Library (glibc) is used on the target it
+ will be version @var{major}.@var{minor} or later. Normally this can
+diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
+index a660e33739b..6183c407a2b 100644
+--- a/gcc/doc/tm.texi
++++ b/gcc/doc/tm.texi
+@@ -381,7 +381,13 @@ the argument @option{-lgcc} to tell the linker to do the search.
+
+ @defmac LINK_GCC_C_SEQUENCE_SPEC
+ The sequence in which libgcc and libc are specified to the linker.
+-By default this is @code{%G %L %G}.
++By default this is @code{%G LINK_LIBATOMIC_SPEC %L %G}.
++@end defmac
++
++@defmac LINK_LIBATOMIC_SPEC
++This macro is used in the default @code{LINK_GCC_C_SEQUENCE_SPEC} to link
++libatomic. By default, it is unset unless @code{ENABLE_AUTOLINK_LIBATOMIC}
++is set.
+ @end defmac
+
+ @defmac POST_LINK_SPEC
+diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
+index f7ab5d48a63..281540aba68 100644
+--- a/gcc/doc/tm.texi.in
++++ b/gcc/doc/tm.texi.in
+@@ -381,7 +381,13 @@ the argument @option{-lgcc} to tell the linker to do the search.
+
+ @defmac LINK_GCC_C_SEQUENCE_SPEC
+ The sequence in which libgcc and libc are specified to the linker.
+-By default this is @code{%G %L %G}.
++By default this is @code{%G LINK_LIBATOMIC_SPEC %L %G}.
++@end defmac
++
++@defmac LINK_LIBATOMIC_SPEC
++This macro is used in the default @code{LINK_GCC_C_SEQUENCE_SPEC} to link
++libatomic. By default, it is unset unless @code{ENABLE_AUTOLINK_LIBATOMIC}
++is set.
+ @end defmac
+
+ @defmac POST_LINK_SPEC
+diff --git a/gcc/gcc.cc b/gcc/gcc.cc
+index 59390fd39d6..dae1dd4cf79 100644
+--- a/gcc/gcc.cc
++++ b/gcc/gcc.cc
+@@ -974,13 +974,23 @@ proper position among the other output files. */
+ # define ASM_DEBUG_OPTION_SPEC ""
+ #endif
+
++#if !defined(LINK_LIBATOMIC_SPEC) && defined(ENABLE_AUTOLINK_LIBATOMIC)
++# ifdef LD_AS_NEEDED_OPTION
++# define LINK_LIBATOMIC_SPEC LD_AS_NEEDED_OPTION " -latomic " LD_NO_AS_NEEDED_OPTION
++# else
++# define LINK_LIBATOMIC_SPEC "-latomic"
++# endif
++#elif !defined(LINK_LIBATOMIC_SPEC)
++# define LINK_LIBATOMIC_SPEC ""
++#endif
++
+ /* Here is the spec for running the linker, after compiling all files. */
+
+ /* This is overridable by the target in case they need to specify the
+ -lgcc and -lc order specially, yet not require them to override all
+ of LINK_COMMAND_SPEC. */
+ #ifndef LINK_GCC_C_SEQUENCE_SPEC
+-#define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}"
++#define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:" LINK_LIBATOMIC_SPEC " %L %G}"
+ #endif
+
+ #ifdef ENABLE_DEFAULT_SSP
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0028-configure-fix-detection-of-atomic-builtins-in-libato.patch b/musl/patches-in-mcm/gcc-13.2.0/0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
new file mode 100644
index 0000000..f92fc7b
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
@@ -0,0 +1,57 @@
+From 5bbbd320e54ab5341cfba83e8af98685131caba1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=B6ren=20Tempel?= <soeren+git@soeren-tempel.net>
+Date: Sun, 29 Aug 2021 12:23:34 +0200
+Subject: [PATCH 28/35] configure: fix detection of atomic builtins in
+ libatomic configure script
+
+Alpine's --enable-autolink-libatomic (which is enabled for riscv64 by
+default) causes the libatomic configure script to incorrectly detect
+which builtins are available on riscv64. This then causes incorrect code
+generation for libatomic since it assumes compiler builtins to be
+available which are not actually available on riscv64.
+
+This commit fixes this issue by disabling linking of libatomic configure
+test code entirely, thereby preventing linking against libatomic.
+
+See:
+
+* https://gitlab.alpinelinux.org/alpine/aports/-/issues/12948
+* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101996#c6
+---
+ libatomic/configure.tgt | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
+index a92ae9e8309..90b579ca4d8 100644
+--- a/libatomic/configure.tgt
++++ b/libatomic/configure.tgt
+@@ -30,6 +30,26 @@
+ # on ${target_cpu}. For example to allow proper use of multilibs.
+ configure_tgt_pre_target_cpu_XCFLAGS="${XCFLAGS}"
+
++# The libatomic configure script performs several checks to determine
++# whether builtins for atomic operations are available. When compiling
++# with --enable-autolink-libatomic the test code compiled by the
++# configure script is also linked against libatomic. This causes it
++# to think that builtins are available, even if there are not, since
++# the tested symbols are provided by libatomic.
++#
++# This is a hack to ensure that we don't link against libatomic by not
++# linking any configure test code at all when --enable-autolink-libatomic
++# is given.
++#
++# See:
++#
++# * https://gitlab.alpinelinux.org/alpine/aports/-/issues/12817
++# * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101996#c4
++#
++if test x$enable_autolink_libatomic = xyes; then
++ gcc_no_link=yes
++fi
++
+ case "${target_cpu}" in
+ alpha*)
+ # fenv.c needs this option to generate inexact exceptions.
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch b/musl/patches-in-mcm/gcc-13.2.0/0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
new file mode 100644
index 0000000..4418cd5
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -0,0 +1,27 @@
+From 430c701a3cefbe09a9c7c8a2f5bbe957f9b2ecb2 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Thu, 30 Jun 2022 16:44:51 +0000
+Subject: [PATCH 29/35] libstdc++: do not throw exceptions for non-C locales on
+ musl targets
+
+---
+ libstdc++-v3/config/locale/generic/c_locale.cc | 3 ---
+ 1 file changed, 3 deletions(-)
+
+diff --git a/libstdc++-v3/config/locale/generic/c_locale.cc b/libstdc++-v3/config/locale/generic/c_locale.cc
+index 8849d78fdfa..aff467f98fe 100644
+--- a/libstdc++-v3/config/locale/generic/c_locale.cc
++++ b/libstdc++-v3/config/locale/generic/c_locale.cc
+@@ -242,9 +242,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
+ // Currently, the generic model only supports the "C" locale.
+ // See http://gcc.gnu.org/ml/libstdc++/2003-02/msg00345.html
+ __cloc = 0;
+- if (strcmp(__s, "C"))
+- __throw_runtime_error(__N("locale::facet::_S_create_c_locale "
+- "name not valid"));
+ }
+
+ void
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gcc-13.2.0/0035-Fix-ICE-observed-in-PR110280.patch b/musl/patches-in-mcm/gcc-13.2.0/0035-Fix-ICE-observed-in-PR110280.patch
new file mode 100644
index 0000000..b9a7eaf
--- /dev/null
+++ b/musl/patches-in-mcm/gcc-13.2.0/0035-Fix-ICE-observed-in-PR110280.patch
@@ -0,0 +1,61 @@
+From ef740fff300fd9eb8285fb5611f6205705ee54ec Mon Sep 17 00:00:00 2001
+From: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
+Date: Fri, 23 Jun 2023 15:27:17 +0530
+Subject: [PATCH 35/35] Fix ICE observed in PR110280.
+
+gcc/ChangeLog:
+ PR tree-optimization/110280
+ * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
+ using build_vector_from_val with the element of input operand, and
+ mask's type if operand and mask's types don't match.
+
+gcc/testsuite/ChangeLog:
+ PR tree-optimization/110280
+ * gcc.target/aarch64/sve/pr110280.c: New test.
+---
+ gcc/match.pd | 9 ++++++++-
+ gcc/testsuite/gcc.target/aarch64/sve/pr110280.c | 12 ++++++++++++
+ 2 files changed, 20 insertions(+), 1 deletion(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr110280.c
+
+diff --git a/gcc/match.pd b/gcc/match.pd
+index 91182448250..c3bb4fbc0a7 100644
+--- a/gcc/match.pd
++++ b/gcc/match.pd
+@@ -8292,7 +8292,14 @@ and,
+
+ (simplify
+ (vec_perm vec_same_elem_p@0 @0 @1)
+- @0)
++ (if (types_match (type, TREE_TYPE (@0)))
++ @0
++ (with
++ {
++ tree elem = uniform_vector_p (@0);
++ }
++ (if (elem)
++ { build_vector_from_val (type, elem); }))))
+
+ /* Push VEC_PERM earlier if that may help FMA perception (PR101895). */
+ (simplify
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr110280.c b/gcc/testsuite/gcc.target/aarch64/sve/pr110280.c
+new file mode 100644
+index 00000000000..d3279f38362
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/pr110280.c
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O3 -fdump-tree-optimized" } */
++
++#include "arm_sve.h"
++
++svuint32_t l()
++{
++ _Alignas(16) const unsigned int lanes[4] = {0, 0, 0, 0};
++ return svld1rq_u32(svptrue_b8(), lanes);
++}
++
++/* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "optimized" } } */
+--
+2.41.0
+
diff --git a/musl/patches-in-mcm/gdb-8.3.1/arm64.diff b/musl/patches-in-mcm/gdb-8.3.1/arm64.diff
new file mode 100644
index 0000000..c8c9c29
--- /dev/null
+++ b/musl/patches-in-mcm/gdb-8.3.1/arm64.diff
@@ -0,0 +1,40 @@
+The signal definitions of musl and gdb collide
+
+The kernel defines "struct sigcontext" in asm/sigcontext.h and musl libc
+defines it in signal.h which collides.
+Kernel 4.14 misses the definitions of struct user_sve_header so we still
+have to use the aarch64-sve-linux-sigcontext.h header file which also
+provides that and make sure aarch64-sve-linux-sigcontext.h does not
+provide the same headers as the kernel or musl.
+
+--- a/gdb/nat/aarch64-sve-linux-ptrace.h
++++ b/gdb/nat/aarch64-sve-linux-ptrace.h
+@@ -23,9 +23,9 @@
+ #include <signal.h>
+ #include <sys/utsname.h>
+ #include <sys/ptrace.h>
+ #include <asm/ptrace.h>
+
+-#ifndef SVE_SIG_ZREGS_SIZE
++#ifndef SVE_PT_REGS_SVE
+ #include "aarch64-sve-linux-sigcontext.h"
+ #endif
+
+--- a/gdb/nat/aarch64-sve-linux-sigcontext.h
++++ b/gdb/nat/aarch64-sve-linux-sigcontext.h
+@@ -19,6 +19,7 @@
+ #ifndef AARCH64_SVE_LINUX_SIGCONTEXT_H
+ #define AARCH64_SVE_LINUX_SIGCONTEXT_H
+
++#ifndef SVE_MAGIC
+ #define SVE_MAGIC 0x53564501
+
+ struct sve_context {
+@@ -128,6 +129,7 @@ struct sve_context {
+ (SVE_SIG_FFR_OFFSET(vq) + SVE_SIG_FFR_SIZE(vq) - SVE_SIG_REGS_OFFSET)
+
+ #define SVE_SIG_CONTEXT_SIZE(vq) (SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq))
++#endif
+
+ /* SVE/FP/SIMD state (NT_ARM_SVE) */
+
diff --git a/musl/patches-in-mcm/gdb-8.3.1/ppc-musl.diff b/musl/patches-in-mcm/gdb-8.3.1/ppc-musl.diff
new file mode 100644
index 0000000..70cfa18
--- /dev/null
+++ b/musl/patches-in-mcm/gdb-8.3.1/ppc-musl.diff
@@ -0,0 +1,93 @@
+--- a/gdb/nat/ppc-linux.h
++++ b/gdb/nat/ppc-linux.h
+@@ -18,7 +18,90 @@
+ #ifndef PPC_LINUX_H
+ #define PPC_LINUX_H 1
+
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ #include <asm/ptrace.h>
++#else // Musl
++// Do not include ptrace.h from Linux headers and since
++// Musl does not define PT_*, define them:
++
++#define PT_R0 0
++#define PT_R1 1
++#define PT_R2 2
++#define PT_R3 3
++#define PT_R4 4
++#define PT_R5 5
++#define PT_R6 6
++#define PT_R7 7
++#define PT_R8 8
++#define PT_R9 9
++#define PT_R10 10
++#define PT_R11 11
++#define PT_R12 12
++#define PT_R13 13
++#define PT_R14 14
++#define PT_R15 15
++#define PT_R16 16
++#define PT_R17 17
++#define PT_R18 18
++#define PT_R19 19
++#define PT_R20 20
++#define PT_R21 21
++#define PT_R22 22
++#define PT_R23 23
++#define PT_R24 24
++#define PT_R25 25
++#define PT_R26 26
++#define PT_R27 27
++#define PT_R28 28
++#define PT_R29 29
++#define PT_R30 30
++#define PT_R31 31
++
++#define PT_NIP 32
++#define PT_MSR 33
++#define PT_ORIG_R3 34
++#define PT_CTR 35
++#define PT_LNK 36
++#define PT_XER 37
++#define PT_CCR 38
++#ifndef __powerpc64__
++#define PT_MQ 39
++#else
++#define PT_SOFTE 39
++#endif
++#define PT_TRAP 40
++#define PT_DAR 41
++#define PT_DSISR 42
++#define PT_RESULT 43
++#define PT_DSCR 44
++#define PT_REGS_COUNT 44
++
++#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
++
++#ifndef __powerpc64__
++
++#define PT_FPR31 (PT_FPR0 + 2*31)
++#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
++
++#else /* __powerpc64__ */
++
++#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
++
++
++#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
++#define PT_VSCR (PT_VR0 + 32*2 + 1)
++#define PT_VRSAVE (PT_VR0 + 33*2)
++
++
++/*
++ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
++ */
++#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
++#define PT_VSR31 (PT_VSR0 + 2*31)
++#endif /* __powerpc64__ */
++
++#endif // Libc
++
+ #include <asm/cputable.h>
+
+ /* This sometimes isn't defined. */
diff --git a/musl/patches-in-mcm/gdb-8.3.1/ppc-ptregs.diff b/musl/patches-in-mcm/gdb-8.3.1/ppc-ptregs.diff
new file mode 100644
index 0000000..743bd2e
--- /dev/null
+++ b/musl/patches-in-mcm/gdb-8.3.1/ppc-ptregs.diff
@@ -0,0 +1,10 @@
+--- a/gdb/gdbserver/linux-ppc-low.c
++++ b/gdb/gdbserver/linux-ppc-low.c
+@@ -21,7 +21,6 @@
+ #include "linux-low.h"
+
+ #include <elf.h>
+-#include <asm/ptrace.h>
+
+ #include "nat/ppc-linux.h"
+ #include "linux-ppc-tdesc.h"
diff --git a/musl/patches-in-mcm/gdb-8.3.1/remove-extraneous-include.diff b/musl/patches-in-mcm/gdb-8.3.1/remove-extraneous-include.diff
new file mode 100644
index 0000000..62ed130
--- /dev/null
+++ b/musl/patches-in-mcm/gdb-8.3.1/remove-extraneous-include.diff
@@ -0,0 +1,12 @@
+--- gdb-8.1/gdb/nat/linux-osdata.c.old 2018-01-04 22:07:23.000000000 -0600
++++ gdb-8.1/gdb/nat/linux-osdata.c 2018-06-22 04:31:42.655497623 -0500
+@@ -23,7 +23,8 @@
+ #include <sys/types.h>
+ #include <sys/sysinfo.h>
+ #include <ctype.h>
+-#include <utmp.h>
++#include <limits.h>
++#define UT_NAMESIZE LOGIN_NAME_MAX
+ #include <time.h>
+ #include <unistd.h>
+ #include <pwd.h>
diff --git a/musl/patches-in-mcm/gdb-8.3.1/s390x-use-elf-gdb_fpregset_t.diff b/musl/patches-in-mcm/gdb-8.3.1/s390x-use-elf-gdb_fpregset_t.diff
new file mode 100644
index 0000000..b01582c
--- /dev/null
+++ b/musl/patches-in-mcm/gdb-8.3.1/s390x-use-elf-gdb_fpregset_t.diff
@@ -0,0 +1,156 @@
+The s390 versions of fill_gregset / supply_gregset and fill_fpregset /
+supply_fpregset declare the data structure to be filled or supplied from
+as gregset_t and fpregset_t, respectively, instead of gdb_gregset_t and
+gdb_fpregset_t. This is incompatible with the declaration of these
+functions in gregset.h.
+gdb/ChangeLog:
+
+ * s390-linux-nat.c (supply_gregset, fill_gregset, fetch_regs)
+ (store_regs): Replace gregset_t by gdb_gregset_t.
+ (supply_fpregset, fill_fpregset, fetch_fpregs, store_fpregs):
+ Replace fpregset_t by gdb_fpregset_t.
+Credit to Andreas Arnez at IBM
+
+---
+ gdb/s390-linux-nat.c | 34 ++++++++++++++++++----------------
+ 1 file changed, 18 insertions(+), 16 deletions(-)
+
+diff --git a/gdb/s390-linux-nat.c b/gdb/s390-linux-nat.c
+index 55a3899..84c304f 100644
+--- a/gdb/s390-linux-nat.c
++++ b/gdb/s390-linux-nat.c
+@@ -100,7 +100,7 @@ static const struct regset s390_64_gregset =
+ make them look like 32-bit registers. */
+
+ void
+-supply_gregset (struct regcache *regcache, const gregset_t *regp)
++supply_gregset (struct regcache *regcache, const gdb_gregset_t *regp)
+ {
+ #ifdef __s390x__
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+@@ -111,7 +111,7 @@ supply_gregset (struct regcache *regcache, const gregset_t *regp)
+ gdb_byte buf[4];
+
+ regcache_supply_regset (&s390_64_gregset, regcache, -1,
+- regp, sizeof (gregset_t));
++ regp, sizeof (gdb_gregset_t));
+ pswm = extract_unsigned_integer ((const gdb_byte *) regp
+ + S390_PSWM_OFFSET, 8, byte_order);
+ pswa = extract_unsigned_integer ((const gdb_byte *) regp
+@@ -126,7 +126,7 @@ supply_gregset (struct regcache *regcache, const gregset_t *regp)
+ #endif
+
+ regcache_supply_regset (&s390_gregset, regcache, -1, regp,
+- sizeof (gregset_t));
++ sizeof (gdb_gregset_t));
+ }
+
+ /* Fill register REGNO (if it is a general-purpose register) in
+@@ -134,14 +134,15 @@ supply_gregset (struct regcache *regcache, const gregset_t *regp)
+ do this for all registers. */
+
+ void
+-fill_gregset (const struct regcache *regcache, gregset_t *regp, int regno)
++fill_gregset (const struct regcache *regcache, gdb_gregset_t *regp,
++ int regno)
+ {
+ #ifdef __s390x__
+ struct gdbarch *gdbarch = regcache->arch ();
+ if (gdbarch_ptr_bit (gdbarch) == 32)
+ {
+ regcache_collect_regset (&s390_64_gregset, regcache, regno,
+- regp, sizeof (gregset_t));
++ regp, sizeof (gdb_gregset_t));
+
+ if (regno == -1
+ || regno == S390_PSWM_REGNUM || regno == S390_PSWA_REGNUM)
+@@ -178,26 +179,27 @@ fill_gregset (const struct regcache *regcache, gregset_t *regp, int regno)
+ #endif
+
+ regcache_collect_regset (&s390_gregset, regcache, regno, regp,
+- sizeof (gregset_t));
++ sizeof (gdb_gregset_t));
+ }
+
+ /* Fill GDB's register array with the floating-point register values
+ in *REGP. */
+ void
+-supply_fpregset (struct regcache *regcache, const fpregset_t *regp)
++supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *regp)
+ {
+ regcache_supply_regset (&s390_fpregset, regcache, -1, regp,
+- sizeof (fpregset_t));
++ sizeof (gdb_fpregset_t));
+ }
+
+ /* Fill register REGNO (if it is a general-purpose register) in
+ *REGP with the value in GDB's register array. If REGNO is -1,
+ do this for all registers. */
+ void
+-fill_fpregset (const struct regcache *regcache, fpregset_t *regp, int regno)
++fill_fpregset (const struct regcache *regcache, gdb_fpregset_t *regp,
++ int regno)
+ {
+ regcache_collect_regset (&s390_fpregset, regcache, regno, regp,
+- sizeof (fpregset_t));
++ sizeof (gdb_fpregset_t));
+ }
+
+ /* Find the TID for the current inferior thread to use with ptrace. */
+@@ -217,7 +219,7 @@ s390_inferior_tid (void)
+ static void
+ fetch_regs (struct regcache *regcache, int tid)
+ {
+- gregset_t regs;
++ gdb_gregset_t regs;
+ ptrace_area parea;
+
+ parea.len = sizeof (regs);
+@@ -226,7 +228,7 @@ fetch_regs (struct regcache *regcache, int tid)
+ if (ptrace (PTRACE_PEEKUSR_AREA, tid, (long) &parea, 0) < 0)
+ perror_with_name (_("Couldn't get registers"));
+
+- supply_gregset (regcache, (const gregset_t *) &regs);
++ supply_gregset (regcache, (const gdb_gregset_t *) &regs);
+ }
+
+ /* Store all valid general-purpose registers in GDB's register cache
+@@ -234,7 +236,7 @@ fetch_regs (struct regcache *regcache, int tid)
+ static void
+ store_regs (const struct regcache *regcache, int tid, int regnum)
+ {
+- gregset_t regs;
++ gdb_gregset_t regs;
+ ptrace_area parea;
+
+ parea.len = sizeof (regs);
+@@ -254,7 +256,7 @@ store_regs (const struct regcache *regcache, int tid, int regnum)
+ static void
+ fetch_fpregs (struct regcache *regcache, int tid)
+ {
+- fpregset_t fpregs;
++ gdb_fpregset_t fpregs;
+ ptrace_area parea;
+
+ parea.len = sizeof (fpregs);
+@@ -263,7 +265,7 @@ fetch_fpregs (struct regcache *regcache, int tid)
+ if (ptrace (PTRACE_PEEKUSR_AREA, tid, (long) &parea, 0) < 0)
+ perror_with_name (_("Couldn't get floating point status"));
+
+- supply_fpregset (regcache, (const fpregset_t *) &fpregs);
++ supply_fpregset (regcache, (const gdb_fpregset_t *) &fpregs);
+ }
+
+ /* Store all valid floating-point registers in GDB's register cache
+@@ -271,7 +273,7 @@ fetch_fpregs (struct regcache *regcache, int tid)
+ static void
+ store_fpregs (const struct regcache *regcache, int tid, int regnum)
+ {
+- fpregset_t fpregs;
++ gdb_fpregset_t fpregs;
+ ptrace_area parea;
+
+ parea.len = sizeof (fpregs);
+--
+1.8.5.6
+
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-05 01:02:22 +0000